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From: Rob Herring <robh@kernel.org>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	mark.rutland@arm.com, thierry.reding@gmail.com,
	jonathanh@nvidia.com, kishon@ti.com, catalin.marinas@arm.com,
	will.deacon@arm.com, jingoohan1@gmail.com,
	gustavo.pimentel@synopsys.com, mperttunen@nvidia.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V6 06/15] dt-bindings: PCI: designware: Add binding for CDM register check
Date: Mon, 13 May 2019 10:10:38 -0500	[thread overview]
Message-ID: <20190513151038.GA30653@bogus> (raw)
In-Reply-To: <20190513050626.14991-7-vidyas@nvidia.com>

On Mon, May 13, 2019 at 10:36:17AM +0530, Vidya Sagar wrote:
> Add support to enable CDM (Configuration Dependent Module) registers check
> for any data corruption. CDM registers include standard PCIe configuration
> space registers, Port Logic registers and iATU and DMA registers.
> Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
> Version 4.90a
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> Changes since [v5]:
> * None
> 
> Changes since [v4]:
> * None
> 
> Changes since [v3]:
> * None
> 
> Changes since [v2]:
> * Changed flag name from 'cdm-check' to 'enable-cdm-check'
> * Added info about Port Logic and DMA registers being part of CDM
> 
> Changes since [v1]:
> * This is a new patch in v2 series
> 
>  Documentation/devicetree/bindings/pci/designware-pcie.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> index 5561a1c060d0..85b872c42a9f 100644
> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> @@ -34,6 +34,11 @@ Optional properties:
>  - clock-names: Must include the following entries:
>  	- "pcie"
>  	- "pcie_bus"
> +- enable-cdm-check: This is a boolean property and if present enables
> +   automatic checking of CDM (Configuration Dependent Module) registers
> +   for data corruption. CDM registers include standard PCIe configuration
> +   space registers, Port Logic registers, DMA and iATU (internal Address
> +   Translation Unit) registers.

snps,enable-cdm-check

>  RC mode:
>  - num-viewport: number of view ports configured in hardware. If a platform
>    does not specify it, the driver assumes 2.
> -- 
> 2.17.1
> 

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	lorenzo.pieralisi@arm.com, mperttunen@nvidia.com,
	mmaddireddy@nvidia.com, linux-pci@vger.kernel.org,
	catalin.marinas@arm.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, kthota@nvidia.com, kishon@ti.com,
	linux-tegra@vger.kernel.org, thierry.reding@gmail.com,
	gustavo.pimentel@synopsys.com, jingoohan1@gmail.com,
	bhelgaas@google.com, jonathanh@nvidia.com,
	linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com
Subject: Re: [PATCH V6 06/15] dt-bindings: PCI: designware: Add binding for CDM register check
Date: Mon, 13 May 2019 10:10:38 -0500	[thread overview]
Message-ID: <20190513151038.GA30653@bogus> (raw)
In-Reply-To: <20190513050626.14991-7-vidyas@nvidia.com>

On Mon, May 13, 2019 at 10:36:17AM +0530, Vidya Sagar wrote:
> Add support to enable CDM (Configuration Dependent Module) registers check
> for any data corruption. CDM registers include standard PCIe configuration
> space registers, Port Logic registers and iATU and DMA registers.
> Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
> Version 4.90a
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> Changes since [v5]:
> * None
> 
> Changes since [v4]:
> * None
> 
> Changes since [v3]:
> * None
> 
> Changes since [v2]:
> * Changed flag name from 'cdm-check' to 'enable-cdm-check'
> * Added info about Port Logic and DMA registers being part of CDM
> 
> Changes since [v1]:
> * This is a new patch in v2 series
> 
>  Documentation/devicetree/bindings/pci/designware-pcie.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> index 5561a1c060d0..85b872c42a9f 100644
> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
> @@ -34,6 +34,11 @@ Optional properties:
>  - clock-names: Must include the following entries:
>  	- "pcie"
>  	- "pcie_bus"
> +- enable-cdm-check: This is a boolean property and if present enables
> +   automatic checking of CDM (Configuration Dependent Module) registers
> +   for data corruption. CDM registers include standard PCIe configuration
> +   space registers, Port Logic registers, DMA and iATU (internal Address
> +   Translation Unit) registers.

snps,enable-cdm-check

>  RC mode:
>  - num-viewport: number of view ports configured in hardware. If a platform
>    does not specify it, the driver assumes 2.
> -- 
> 2.17.1
> 

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  reply	other threads:[~2019-05-13 15:10 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-13  5:06 [PATCH V6 00/15] Add Tegra194 PCIe support Vidya Sagar
2019-05-13  5:06 ` Vidya Sagar
2019-05-13  5:06 ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 01/15] PCI: Add #defines for some of PCIe spec r4.0 features Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 02/15] PCI/PME: Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  7:25   ` Christoph Hellwig
2019-05-13  7:25     ` Christoph Hellwig
2019-05-14  3:30     ` Vidya Sagar
2019-05-14  3:30       ` Vidya Sagar
2019-05-14  3:30       ` Vidya Sagar
2019-05-14  6:02       ` Christoph Hellwig
2019-05-14  6:02         ` Christoph Hellwig
2019-05-14  6:02         ` Christoph Hellwig
2019-05-16 13:34       ` Bjorn Helgaas
2019-05-16 13:34         ` Bjorn Helgaas
2019-05-17  8:19         ` Vidya Sagar
2019-05-17  8:19           ` Vidya Sagar
2019-05-17  8:19           ` Vidya Sagar
2019-05-17 13:24           ` Bjorn Helgaas
2019-05-17 13:24             ` Bjorn Helgaas
2019-05-17 17:53             ` Vidya Sagar
2019-05-17 17:53               ` Vidya Sagar
2019-05-17 17:53               ` Vidya Sagar
2019-05-17 18:55               ` Bjorn Helgaas
2019-05-17 18:55                 ` Bjorn Helgaas
2019-05-18  1:58                 ` Vidya Sagar
2019-05-18  1:58                   ` Vidya Sagar
2019-05-18  1:58                   ` Vidya Sagar
2019-05-20 17:57                   ` Bjorn Helgaas
2019-05-20 17:57                     ` Bjorn Helgaas
2019-05-21  5:06                     ` Vidya Sagar
2019-05-21  5:06                       ` Vidya Sagar
2019-05-21  5:06                       ` Vidya Sagar
2019-05-16 13:28   ` Bjorn Helgaas
2019-05-16 13:28     ` Bjorn Helgaas
2019-05-13  5:06 ` [PATCH V6 03/15] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 04/15] PCI: dwc: Move config space capability search API Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 05/15] PCI: dwc: Add ext " Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 06/15] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13 15:10   ` Rob Herring [this message]
2019-05-13 15:10     ` Rob Herring
2019-05-14  5:27     ` Vidya Sagar
2019-05-14  5:27       ` Vidya Sagar
2019-05-14  5:27       ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 07/15] PCI: dwc: Add support to enable " Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 08/15] dt-bindings: Add PCIe supports-clkreq property Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 09/15] dt-bindings: PCI: tegra: Add device tree support for Tegra194 Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 10/15] dt-bindings: PHY: P2U: Add Tegra194 P2U block Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13 15:22   ` Rob Herring
2019-05-13 15:22     ` Rob Herring
2019-05-13 15:22     ` Rob Herring
2019-05-13  5:06 ` [PATCH V6 11/15] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 12/15] arm64: tegra: Enable PCIe slots in P2972-0000 board Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 13/15] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 14/15] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06 ` [PATCH V6 15/15] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar
2019-05-13  5:06   ` Vidya Sagar

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