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From: Andrew Lunn <andrew@lunn.ch>
To: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	peter@korsgaard.com, palmer@sifive.com,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	linux-i2c@vger.kernel.org, paul.walmsley@sifive.com,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
Date: Wed, 29 May 2019 17:53:46 +0200	[thread overview]
Message-ID: <20190529155346.GA18059@lunn.ch> (raw)
In-Reply-To: <1559104047-13920-4-git-send-email-sagar.kadam@sifive.com>

On Wed, May 29, 2019 at 09:57:27AM +0530, Sagar Shrikant Kadam wrote:
> The i2c-ocore driver already has a polling mode interface.But it needs
> a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> There is an erratum in FU540 chip that prevents interrupt driven i2c
> transfers from working, and also the I2C controller's interrupt bit
> cannot be cleared if set, due to this the existing i2c polling mode
> interface added in mainline earlier doesn't work, and CPU stall's
> infinitely, when-ever i2c transfer is initiated.
> 
> Ref:
> 	commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling")
> 
> The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> FU540-COOO SoC.
> 
> The polling function identifies a SiFive device based on the device node
> and enables the workaround.
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>

Hi Sagar

When you repost, you are supposed to add any reviewed-by, or acked-by
tags you received.

     Andrew

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	peter@korsgaard.com, palmer@sifive.com,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	linux-i2c@vger.kernel.org, paul.walmsley@sifive.com,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
Date: Wed, 29 May 2019 17:53:46 +0200	[thread overview]
Message-ID: <20190529155346.GA18059@lunn.ch> (raw)
In-Reply-To: <1559104047-13920-4-git-send-email-sagar.kadam@sifive.com>

On Wed, May 29, 2019 at 09:57:27AM +0530, Sagar Shrikant Kadam wrote:
> The i2c-ocore driver already has a polling mode interface.But it needs
> a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> There is an erratum in FU540 chip that prevents interrupt driven i2c
> transfers from working, and also the I2C controller's interrupt bit
> cannot be cleared if set, due to this the existing i2c polling mode
> interface added in mainline earlier doesn't work, and CPU stall's
> infinitely, when-ever i2c transfer is initiated.
> 
> Ref:
> 	commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling")
> 
> The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> FU540-COOO SoC.
> 
> The polling function identifies a SiFive device based on the device node
> and enables the workaround.
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>

Hi Sagar

When you repost, you are supposed to add any reviewed-by, or acked-by
tags you received.

     Andrew

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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Cc: robh+dt@kernel.org, mark.rutland@arm.com, peter@korsgaard.com,
	palmer@sifive.com, paul.walmsley@sifive.com,
	linux-i2c@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
Date: Wed, 29 May 2019 17:53:46 +0200	[thread overview]
Message-ID: <20190529155346.GA18059@lunn.ch> (raw)
In-Reply-To: <1559104047-13920-4-git-send-email-sagar.kadam@sifive.com>

On Wed, May 29, 2019 at 09:57:27AM +0530, Sagar Shrikant Kadam wrote:
> The i2c-ocore driver already has a polling mode interface.But it needs
> a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> There is an erratum in FU540 chip that prevents interrupt driven i2c
> transfers from working, and also the I2C controller's interrupt bit
> cannot be cleared if set, due to this the existing i2c polling mode
> interface added in mainline earlier doesn't work, and CPU stall's
> infinitely, when-ever i2c transfer is initiated.
> 
> Ref:
> 	commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling")
> 
> The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> FU540-COOO SoC.
> 
> The polling function identifies a SiFive device based on the device node
> and enables the workaround.
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>

Hi Sagar

When you repost, you are supposed to add any reviewed-by, or acked-by
tags you received.

     Andrew

  reply	other threads:[~2019-05-29 15:53 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-29  4:27 [PATCH v8 0/3] Extend dt bindings to support I2C on sifive devices and a fix broken IRQ in polling mode Sagar Shrikant Kadam
2019-05-29  4:27 ` Sagar Shrikant Kadam
2019-05-29  4:27 ` [PATCH v8 1/3] dt-bindings: i2c: extend existing opencore bindings Sagar Shrikant Kadam
2019-05-29  4:27   ` Sagar Shrikant Kadam
2019-05-30  3:57   ` Sagar Kadam
2019-05-30  3:57     ` Sagar Kadam
2019-05-29  4:27 ` [PATCH v8 2/3] i2c-ocores: sifive: add support for i2c device on FU540-c000 SoC Sagar Shrikant Kadam
2019-05-29  4:27   ` Sagar Shrikant Kadam
2019-05-29  4:27 ` [PATCH v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC Sagar Shrikant Kadam
2019-05-29  4:27   ` Sagar Shrikant Kadam
2019-05-29 15:53   ` Andrew Lunn [this message]
2019-05-29 15:53     ` Andrew Lunn
2019-05-29 15:53     ` Andrew Lunn
2019-05-30  3:55     ` Sagar Kadam
2019-05-30  3:55       ` Sagar Kadam
  -- strict thread matches above, loose matches on Subject: below --
2019-05-29  4:26 Sagar Shrikant Kadam
2019-05-29  4:26 ` Sagar Shrikant Kadam

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