From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org, Igor Mammedov <imammedo@redhat.com>
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Yoshinori Sato" <ysato@users.sourceforge.jp>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [Qemu-devel] [PATCH v19 09/21] target/rx: Collect all bytes during disassembly
Date: Tue, 11 Jun 2019 13:37:19 +0200 [thread overview]
Message-ID: <20190611113731.16940-10-philmd@redhat.com> (raw)
In-Reply-To: <20190611113731.16940-1-philmd@redhat.com>
From: Richard Henderson <richard.henderson@linaro.org>
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20190607091116.49044-23-ysato@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/rx/disas.c | 62 ++++++++++++++++++++++++++++++++---------------
1 file changed, 42 insertions(+), 20 deletions(-)
diff --git a/target/rx/disas.c b/target/rx/disas.c
index ebc1a44249..5a32a87534 100644
--- a/target/rx/disas.c
+++ b/target/rx/disas.c
@@ -25,43 +25,59 @@ typedef struct DisasContext {
disassemble_info *dis;
uint32_t addr;
uint32_t pc;
+ uint8_t len;
+ uint8_t bytes[8];
} DisasContext;
static uint32_t decode_load_bytes(DisasContext *ctx, uint32_t insn,
- int i, int n)
+ int i, int n)
{
- bfd_byte buf;
+ uint32_t addr = ctx->addr;
+
+ g_assert(ctx->len == i);
+ g_assert(n <= ARRAY_SIZE(ctx->bytes));
+
while (++i <= n) {
- ctx->dis->read_memory_func(ctx->addr++, &buf, 1, ctx->dis);
- insn |= buf << (32 - i * 8);
+ ctx->dis->read_memory_func(addr++, &ctx->bytes[i - 1], 1, ctx->dis);
+ insn |= ctx->bytes[i - 1] << (32 - i * 8);
}
+ ctx->addr = addr;
+ ctx->len = n;
+
return insn;
}
static int32_t li(DisasContext *ctx, int sz)
{
- int32_t addr;
- bfd_byte buf[4];
- addr = ctx->addr;
+ uint32_t addr = ctx->addr;
+ uintptr_t len = ctx->len;
switch (sz) {
case 1:
+ g_assert(len + 1 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 1;
- ctx->dis->read_memory_func(addr, buf, 1, ctx->dis);
- return (int8_t)buf[0];
+ ctx->len += 1;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 1, ctx->dis);
+ return (int8_t)ctx->bytes[len];
case 2:
+ g_assert(len + 2 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 2;
- ctx->dis->read_memory_func(addr, buf, 2, ctx->dis);
- return ldsw_le_p(buf);
+ ctx->len += 2;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 2, ctx->dis);
+ return ldsw_le_p(ctx->bytes + len);
case 3:
+ g_assert(len + 3 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 3;
- ctx->dis->read_memory_func(addr, buf, 3, ctx->dis);
- return (int8_t)buf[2] << 16 | lduw_le_p(buf);
+ ctx->len += 3;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 3, ctx->dis);
+ return (int8_t)ctx->bytes[len + 2] << 16 | lduw_le_p(ctx->bytes + len);
case 0:
+ g_assert(len + 4 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 4;
- ctx->dis->read_memory_func(addr, buf, 4, ctx->dis);
- return ldl_le_p(buf);
+ ctx->len += 4;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 4, ctx->dis);
+ return ldl_le_p(ctx->bytes + len);
default:
g_assert_not_reached();
}
@@ -110,7 +126,7 @@ static const char psw[] = {
static void rx_index_addr(DisasContext *ctx, char out[8], int ld, int mi)
{
uint32_t addr = ctx->addr;
- uint8_t buf[2];
+ uintptr_t len = ctx->len;
uint16_t dsp;
switch (ld) {
@@ -119,14 +135,18 @@ static void rx_index_addr(DisasContext *ctx, char out[8], int ld, int mi)
out[0] = '\0';
return;
case 1:
+ g_assert(len + 1 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 1;
- ctx->dis->read_memory_func(addr, buf, 1, ctx->dis);
- dsp = buf[0];
+ ctx->len += 1;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 1, ctx->dis);
+ dsp = ctx->bytes[len];
break;
case 2:
+ g_assert(len + 2 <= ARRAY_SIZE(ctx->bytes));
ctx->addr += 2;
- ctx->dis->read_memory_func(addr, buf, 2, ctx->dis);
- dsp = lduw_le_p(buf);
+ ctx->len += 2;
+ ctx->dis->read_memory_func(addr, ctx->bytes + len, 2, ctx->dis);
+ dsp = lduw_le_p(ctx->bytes + len);
break;
default:
g_assert_not_reached();
@@ -1392,8 +1412,10 @@ int print_insn_rx(bfd_vma addr, disassemble_info *dis)
DisasContext ctx;
uint32_t insn;
int i;
+
ctx.dis = dis;
ctx.pc = ctx.addr = addr;
+ ctx.len = 0;
insn = decode_load(&ctx);
if (!decode(&ctx, insn)) {
--
2.20.1
next prev parent reply other threads:[~2019-06-11 12:10 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-11 11:37 [Qemu-devel] [PATCH v19 00/21] Add RX archtecture support Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 01/21] target/rx: TCG translation Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 02/21] target/rx: TCG helper Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 03/21] target/rx: CPU definition Philippe Mathieu-Daudé
2019-06-11 13:12 ` Igor Mammedov
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 04/21] target/rx: RX disassembler Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 05/21] target/rx: Disassemble rx_index_addr into a string Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 06/21] target/rx: Replace operand with prt_ldmi in disassembler Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 07/21] target/rx: Use prt_ldmi for XCHG_mr disassembly Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 08/21] target/rx: Emit all disassembly in one prt() Philippe Mathieu-Daudé
2019-06-11 11:37 ` Philippe Mathieu-Daudé [this message]
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 10/21] target/rx: Dump bytes for each insn during disassembly Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 11/21] hw/intc: RX62N interrupt controller (ICUa) Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 12/21] hw/timer: RX62N internal timer modules Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 13/21] hw/char: RX62N serial communication interface (SCI) Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 14/21] hw/rx: RX Target hardware definition Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 15/21] hw/rx: Honor -accel qtest Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 16/21] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core Philippe Mathieu-Daudé
2019-06-11 13:21 ` Yoshinori Sato
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 17/21] qemu/bitops.h: Add extract8 and extract16 Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 18/21] hw/registerfields.h: Add 8bit and 16bit register macros Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 19/21] Add rx-softmmu Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 20/21] MAINTAINERS: Add RX Philippe Mathieu-Daudé
2019-06-11 11:37 ` [Qemu-devel] [PATCH v19 21/21] BootLinuxConsoleTest: Test the RX-Virt machine Philippe Mathieu-Daudé
2019-06-11 12:59 ` [Qemu-devel] [PATCH v19 00/21] Add RX archtecture support no-reply
2019-06-11 13:19 ` no-reply
2019-06-11 13:21 ` no-reply
2019-06-11 13:39 ` no-reply
2019-06-11 13:42 ` no-reply
2019-06-11 13:51 ` no-reply
2019-06-11 14:16 ` no-reply
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