* [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-06-15 5:17 ` Ramon Fried
0 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-06-15 5:17 UTC (permalink / raw)
To: qemu-devel, qemu-trivial
Cc: Peter Maydell, Jason Wang, Alistair Francis,
open list:Xilinx Zynq, Ramon Fried, Edgar E. Iglesias
The RX ring descriptors control field is used for setting
SOF and EOF (start of frame and end of frame).
The SOF and EOF weren't cleared from the previous descriptors,
causing inconsistencies in ring buffer.
Fix that by clearing the control field of every descriptors we're
processing.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
---
hw/net/cadence_gem.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index ecee22525c..d83a82bdb0 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
desc[1] |= DESC_1_RX_SOF;
}
+static inline void rx_desc_clear(uint32_t *desc)
+{
+ desc[1] = 0;
+}
+
static inline void rx_desc_set_eof(uint32_t *desc)
{
desc[1] |= DESC_1_RX_EOF;
@@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
/* Update the descriptor. */
+ rx_desc_clear(s->rx_desc[q]);
+
if (first_desc) {
rx_desc_set_sof(s->rx_desc[q]);
first_desc = false;
--
2.21.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Qemu-arm] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-06-15 5:17 ` Ramon Fried
0 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-06-15 5:17 UTC (permalink / raw)
To: qemu-devel, qemu-trivial
Cc: Peter Maydell, Jason Wang, Alistair Francis,
open list:Xilinx Zynq, Ramon Fried
The RX ring descriptors control field is used for setting
SOF and EOF (start of frame and end of frame).
The SOF and EOF weren't cleared from the previous descriptors,
causing inconsistencies in ring buffer.
Fix that by clearing the control field of every descriptors we're
processing.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
---
hw/net/cadence_gem.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index ecee22525c..d83a82bdb0 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
desc[1] |= DESC_1_RX_SOF;
}
+static inline void rx_desc_clear(uint32_t *desc)
+{
+ desc[1] = 0;
+}
+
static inline void rx_desc_set_eof(uint32_t *desc)
{
desc[1] |= DESC_1_RX_EOF;
@@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
/* Update the descriptor. */
+ rx_desc_clear(s->rx_desc[q]);
+
if (first_desc) {
rx_desc_set_sof(s->rx_desc[q]);
first_desc = false;
--
2.21.0
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [Qemu-trivial] [PATCH] net: cadence_gem: clear RX control descriptor
2019-06-15 5:17 ` [Qemu-arm] " Ramon Fried
(?)
@ 2019-07-16 7:11 ` Ramon Fried
-1 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 7:11 UTC (permalink / raw)
To: qemu-devel, qemu-trivial
Cc: Edgar E. Iglesias, Alistair Francis, Peter Maydell, Jason Wang,
open list:Xilinx Zynq
ping
On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
>
> The RX ring descriptors control field is used for setting
> SOF and EOF (start of frame and end of frame).
> The SOF and EOF weren't cleared from the previous descriptors,
> causing inconsistencies in ring buffer.
> Fix that by clearing the control field of every descriptors we're
> processing.
>
> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> ---
> hw/net/cadence_gem.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index ecee22525c..d83a82bdb0 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> desc[1] |= DESC_1_RX_SOF;
> }
>
> +static inline void rx_desc_clear(uint32_t *desc)
> +{
> + desc[1] = 0;
> +}
> +
> static inline void rx_desc_set_eof(uint32_t *desc)
> {
> desc[1] |= DESC_1_RX_EOF;
> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>
> /* Update the descriptor. */
> + rx_desc_clear(s->rx_desc[q]);
> +
> if (first_desc) {
> rx_desc_set_sof(s->rx_desc[q]);
> first_desc = false;
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 7:11 ` Ramon Fried
0 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 7:11 UTC (permalink / raw)
To: qemu-devel, qemu-trivial
Cc: Edgar E. Iglesias, Jason Wang, Alistair Francis,
open list:Xilinx Zynq, Peter Maydell
ping
On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
>
> The RX ring descriptors control field is used for setting
> SOF and EOF (start of frame and end of frame).
> The SOF and EOF weren't cleared from the previous descriptors,
> causing inconsistencies in ring buffer.
> Fix that by clearing the control field of every descriptors we're
> processing.
>
> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> ---
> hw/net/cadence_gem.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index ecee22525c..d83a82bdb0 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> desc[1] |= DESC_1_RX_SOF;
> }
>
> +static inline void rx_desc_clear(uint32_t *desc)
> +{
> + desc[1] = 0;
> +}
> +
> static inline void rx_desc_set_eof(uint32_t *desc)
> {
> desc[1] |= DESC_1_RX_EOF;
> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>
> /* Update the descriptor. */
> + rx_desc_clear(s->rx_desc[q]);
> +
> if (first_desc) {
> rx_desc_set_sof(s->rx_desc[q]);
> first_desc = false;
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-arm] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 7:11 ` Ramon Fried
0 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 7:11 UTC (permalink / raw)
To: qemu-devel, qemu-trivial
Cc: Jason Wang, Alistair Francis, open list:Xilinx Zynq,
Peter Maydell
ping
On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
>
> The RX ring descriptors control field is used for setting
> SOF and EOF (start of frame and end of frame).
> The SOF and EOF weren't cleared from the previous descriptors,
> causing inconsistencies in ring buffer.
> Fix that by clearing the control field of every descriptors we're
> processing.
>
> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> ---
> hw/net/cadence_gem.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index ecee22525c..d83a82bdb0 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> desc[1] |= DESC_1_RX_SOF;
> }
>
> +static inline void rx_desc_clear(uint32_t *desc)
> +{
> + desc[1] = 0;
> +}
> +
> static inline void rx_desc_set_eof(uint32_t *desc)
> {
> desc[1] |= DESC_1_RX_EOF;
> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>
> /* Update the descriptor. */
> + rx_desc_clear(s->rx_desc[q]);
> +
> if (first_desc) {
> rx_desc_set_sof(s->rx_desc[q]);
> first_desc = false;
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-trivial] [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
2019-07-16 7:11 ` [Qemu-arm] " Ramon Fried
(?)
@ 2019-07-16 7:19 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-16 7:19 UTC (permalink / raw)
To: Ramon Fried, qemu-devel, qemu-trivial
Cc: Edgar E. Iglesias, Jason Wang, Alistair Francis,
open list:Xilinx Zynq, Peter Maydell
On 7/16/19 9:11 AM, Ramon Fried wrote:
> ping
>
> On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
>>
>> The RX ring descriptors control field is used for setting
>> SOF and EOF (start of frame and end of frame).
>> The SOF and EOF weren't cleared from the previous descriptors,
>> causing inconsistencies in ring buffer.
>> Fix that by clearing the control field of every descriptors we're
>> processing.
>>
>> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
>> ---
>> hw/net/cadence_gem.c | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
>> index ecee22525c..d83a82bdb0 100644
>> --- a/hw/net/cadence_gem.c
>> +++ b/hw/net/cadence_gem.c
>> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
>> desc[1] |= DESC_1_RX_SOF;
>> }
>>
>> +static inline void rx_desc_clear(uint32_t *desc)
>> +{
>> + desc[1] = 0;
>> +}
>> +
>> static inline void rx_desc_set_eof(uint32_t *desc)
>> {
>> desc[1] |= DESC_1_RX_EOF;
>> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
>> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>>
>> /* Update the descriptor. */
>> + rx_desc_clear(s->rx_desc[q]);
Maybe move the call before the comment, regardless:
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> +
>> if (first_desc) {
>> rx_desc_set_sof(s->rx_desc[q]);
>> first_desc = false;
>> --
>> 2.21.0
>>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 7:19 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-16 7:19 UTC (permalink / raw)
To: Ramon Fried, qemu-devel, qemu-trivial
Cc: Edgar E. Iglesias, Jason Wang, Alistair Francis,
open list:Xilinx Zynq, Peter Maydell
On 7/16/19 9:11 AM, Ramon Fried wrote:
> ping
>
> On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
>>
>> The RX ring descriptors control field is used for setting
>> SOF and EOF (start of frame and end of frame).
>> The SOF and EOF weren't cleared from the previous descriptors,
>> causing inconsistencies in ring buffer.
>> Fix that by clearing the control field of every descriptors we're
>> processing.
>>
>> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
>> ---
>> hw/net/cadence_gem.c | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
>> index ecee22525c..d83a82bdb0 100644
>> --- a/hw/net/cadence_gem.c
>> +++ b/hw/net/cadence_gem.c
>> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
>> desc[1] |= DESC_1_RX_SOF;
>> }
>>
>> +static inline void rx_desc_clear(uint32_t *desc)
>> +{
>> + desc[1] = 0;
>> +}
>> +
>> static inline void rx_desc_set_eof(uint32_t *desc)
>> {
>> desc[1] |= DESC_1_RX_EOF;
>> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
>> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>>
>> /* Update the descriptor. */
>> + rx_desc_clear(s->rx_desc[q]);
Maybe move the call before the comment, regardless:
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> +
>> if (first_desc) {
>> rx_desc_set_sof(s->rx_desc[q]);
>> first_desc = false;
>> --
>> 2.21.0
>>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-arm] [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 7:19 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 17+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-16 7:19 UTC (permalink / raw)
To: Ramon Fried, qemu-devel, qemu-trivial
Cc: Jason Wang, Alistair Francis, open list:Xilinx Zynq,
Peter Maydell
On 7/16/19 9:11 AM, Ramon Fried wrote:
> ping
>
> On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
>>
>> The RX ring descriptors control field is used for setting
>> SOF and EOF (start of frame and end of frame).
>> The SOF and EOF weren't cleared from the previous descriptors,
>> causing inconsistencies in ring buffer.
>> Fix that by clearing the control field of every descriptors we're
>> processing.
>>
>> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
>> ---
>> hw/net/cadence_gem.c | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
>> index ecee22525c..d83a82bdb0 100644
>> --- a/hw/net/cadence_gem.c
>> +++ b/hw/net/cadence_gem.c
>> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
>> desc[1] |= DESC_1_RX_SOF;
>> }
>>
>> +static inline void rx_desc_clear(uint32_t *desc)
>> +{
>> + desc[1] = 0;
>> +}
>> +
>> static inline void rx_desc_set_eof(uint32_t *desc)
>> {
>> desc[1] |= DESC_1_RX_EOF;
>> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
>> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>>
>> /* Update the descriptor. */
>> + rx_desc_clear(s->rx_desc[q]);
Maybe move the call before the comment, regardless:
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> +
>> if (first_desc) {
>> rx_desc_set_sof(s->rx_desc[q]);
>> first_desc = false;
>> --
>> 2.21.0
>>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-trivial] [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
2019-07-16 7:19 ` [Qemu-arm] " Philippe Mathieu-Daudé
@ 2019-07-16 11:01 ` Ramon Fried
-1 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 11:01 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: qemu-devel, qemu-trivial, Edgar E. Iglesias, Jason Wang,
Alistair Francis, open list:Xilinx Zynq, Peter Maydell
On Tue, Jul 16, 2019 at 10:19 AM Philippe Mathieu-Daudé
<philmd@redhat.com> wrote:
>
> On 7/16/19 9:11 AM, Ramon Fried wrote:
> > ping
> >
> > On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
> >>
> >> The RX ring descriptors control field is used for setting
> >> SOF and EOF (start of frame and end of frame).
> >> The SOF and EOF weren't cleared from the previous descriptors,
> >> causing inconsistencies in ring buffer.
> >> Fix that by clearing the control field of every descriptors we're
> >> processing.
> >>
> >> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> >> ---
> >> hw/net/cadence_gem.c | 7 +++++++
> >> 1 file changed, 7 insertions(+)
> >>
> >> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> >> index ecee22525c..d83a82bdb0 100644
> >> --- a/hw/net/cadence_gem.c
> >> +++ b/hw/net/cadence_gem.c
> >> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> >> desc[1] |= DESC_1_RX_SOF;
> >> }
> >>
> >> +static inline void rx_desc_clear(uint32_t *desc)
> >> +{
> >> + desc[1] = 0;
> >> +}
> >> +
> >> static inline void rx_desc_set_eof(uint32_t *desc)
> >> {
> >> desc[1] |= DESC_1_RX_EOF;
> >> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> >> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
> >>
> >> /* Update the descriptor. */
> >> + rx_desc_clear(s->rx_desc[q]);
>
> Maybe move the call before the comment, regardless:
Make sense, sent v2.
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> >> +
> >> if (first_desc) {
> >> rx_desc_set_sof(s->rx_desc[q]);
> >> first_desc = false;
> >> --
> >> 2.21.0
> >>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 11:01 ` Ramon Fried
0 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 11:01 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, qemu-trivial, Jason Wang, Alistair Francis,
qemu-devel, open list:Xilinx Zynq, Edgar E. Iglesias
On Tue, Jul 16, 2019 at 10:19 AM Philippe Mathieu-Daudé
<philmd@redhat.com> wrote:
>
> On 7/16/19 9:11 AM, Ramon Fried wrote:
> > ping
> >
> > On Sat, Jun 15, 2019 at 8:17 AM Ramon Fried <rfried.dev@gmail.com> wrote:
> >>
> >> The RX ring descriptors control field is used for setting
> >> SOF and EOF (start of frame and end of frame).
> >> The SOF and EOF weren't cleared from the previous descriptors,
> >> causing inconsistencies in ring buffer.
> >> Fix that by clearing the control field of every descriptors we're
> >> processing.
> >>
> >> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> >> ---
> >> hw/net/cadence_gem.c | 7 +++++++
> >> 1 file changed, 7 insertions(+)
> >>
> >> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> >> index ecee22525c..d83a82bdb0 100644
> >> --- a/hw/net/cadence_gem.c
> >> +++ b/hw/net/cadence_gem.c
> >> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> >> desc[1] |= DESC_1_RX_SOF;
> >> }
> >>
> >> +static inline void rx_desc_clear(uint32_t *desc)
> >> +{
> >> + desc[1] = 0;
> >> +}
> >> +
> >> static inline void rx_desc_set_eof(uint32_t *desc)
> >> {
> >> desc[1] |= DESC_1_RX_EOF;
> >> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> >> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
> >>
> >> /* Update the descriptor. */
> >> + rx_desc_clear(s->rx_desc[q]);
>
> Maybe move the call before the comment, regardless:
Make sense, sent v2.
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> >> +
> >> if (first_desc) {
> >> rx_desc_set_sof(s->rx_desc[q]);
> >> first_desc = false;
> >> --
> >> 2.21.0
> >>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [Qemu-trivial] [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
2019-06-15 5:17 ` [Qemu-arm] " Ramon Fried
(?)
@ 2019-07-16 8:42 ` Jason Wang
-1 siblings, 0 replies; 17+ messages in thread
From: Jason Wang @ 2019-07-16 8:42 UTC (permalink / raw)
To: Ramon Fried, qemu-devel, qemu-trivial
Cc: Peter Maydell, Alistair Francis, open list:Xilinx Zynq,
Edgar E. Iglesias
On 2019/6/15 下午1:17, Ramon Fried wrote:
> The RX ring descriptors control field is used for setting
> SOF and EOF (start of frame and end of frame).
> The SOF and EOF weren't cleared from the previous descriptors,
> causing inconsistencies in ring buffer.
> Fix that by clearing the control field of every descriptors we're
> processing.
>
> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> ---
> hw/net/cadence_gem.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index ecee22525c..d83a82bdb0 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> desc[1] |= DESC_1_RX_SOF;
> }
>
> +static inline void rx_desc_clear(uint32_t *desc)
Nit: is this better to name this as "rx_desc_clear_control()" ?
Thanks
> +{
> + desc[1] = 0;
> +}
> +
> static inline void rx_desc_set_eof(uint32_t *desc)
> {
> desc[1] |= DESC_1_RX_EOF;
> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>
> /* Update the descriptor. */
> + rx_desc_clear(s->rx_desc[q]);
> +
> if (first_desc) {
> rx_desc_set_sof(s->rx_desc[q]);
> first_desc = false;
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 8:42 ` Jason Wang
0 siblings, 0 replies; 17+ messages in thread
From: Jason Wang @ 2019-07-16 8:42 UTC (permalink / raw)
To: Ramon Fried, qemu-devel, qemu-trivial
Cc: Peter Maydell, Alistair Francis, open list:Xilinx Zynq,
Edgar E. Iglesias
On 2019/6/15 下午1:17, Ramon Fried wrote:
> The RX ring descriptors control field is used for setting
> SOF and EOF (start of frame and end of frame).
> The SOF and EOF weren't cleared from the previous descriptors,
> causing inconsistencies in ring buffer.
> Fix that by clearing the control field of every descriptors we're
> processing.
>
> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> ---
> hw/net/cadence_gem.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index ecee22525c..d83a82bdb0 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> desc[1] |= DESC_1_RX_SOF;
> }
>
> +static inline void rx_desc_clear(uint32_t *desc)
Nit: is this better to name this as "rx_desc_clear_control()" ?
Thanks
> +{
> + desc[1] = 0;
> +}
> +
> static inline void rx_desc_set_eof(uint32_t *desc)
> {
> desc[1] |= DESC_1_RX_EOF;
> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>
> /* Update the descriptor. */
> + rx_desc_clear(s->rx_desc[q]);
> +
> if (first_desc) {
> rx_desc_set_sof(s->rx_desc[q]);
> first_desc = false;
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-arm] [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 8:42 ` Jason Wang
0 siblings, 0 replies; 17+ messages in thread
From: Jason Wang @ 2019-07-16 8:42 UTC (permalink / raw)
To: Ramon Fried, qemu-devel, qemu-trivial
Cc: Peter Maydell, Alistair Francis, open list:Xilinx Zynq
On 2019/6/15 下午1:17, Ramon Fried wrote:
> The RX ring descriptors control field is used for setting
> SOF and EOF (start of frame and end of frame).
> The SOF and EOF weren't cleared from the previous descriptors,
> causing inconsistencies in ring buffer.
> Fix that by clearing the control field of every descriptors we're
> processing.
>
> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> ---
> hw/net/cadence_gem.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index ecee22525c..d83a82bdb0 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> desc[1] |= DESC_1_RX_SOF;
> }
>
> +static inline void rx_desc_clear(uint32_t *desc)
Nit: is this better to name this as "rx_desc_clear_control()" ?
Thanks
> +{
> + desc[1] = 0;
> +}
> +
> static inline void rx_desc_set_eof(uint32_t *desc)
> {
> desc[1] |= DESC_1_RX_EOF;
> @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
>
> /* Update the descriptor. */
> + rx_desc_clear(s->rx_desc[q]);
> +
> if (first_desc) {
> rx_desc_set_sof(s->rx_desc[q]);
> first_desc = false;
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-trivial] [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
2019-07-16 8:42 ` [Qemu-arm] " Jason Wang
(?)
@ 2019-07-16 11:01 ` Ramon Fried
-1 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 11:01 UTC (permalink / raw)
To: Jason Wang
Cc: qemu-devel, qemu-trivial, Peter Maydell, Alistair Francis,
open list:Xilinx Zynq, Edgar E. Iglesias
On Tue, Jul 16, 2019 at 11:42 AM Jason Wang <jasowang@redhat.com> wrote:
>
>
> On 2019/6/15 下午1:17, Ramon Fried wrote:
> > The RX ring descriptors control field is used for setting
> > SOF and EOF (start of frame and end of frame).
> > The SOF and EOF weren't cleared from the previous descriptors,
> > causing inconsistencies in ring buffer.
> > Fix that by clearing the control field of every descriptors we're
> > processing.
> >
> > Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> > ---
> > hw/net/cadence_gem.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> > index ecee22525c..d83a82bdb0 100644
> > --- a/hw/net/cadence_gem.c
> > +++ b/hw/net/cadence_gem.c
> > @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> > desc[1] |= DESC_1_RX_SOF;
> > }
> >
> > +static inline void rx_desc_clear(uint32_t *desc)
>
>
> Nit: is this better to name this as "rx_desc_clear_control()" ?
I agree, sent v2.
>
> Thanks
>
>
> > +{
> > + desc[1] = 0;
> > +}
> > +
> > static inline void rx_desc_set_eof(uint32_t *desc)
> > {
> > desc[1] |= DESC_1_RX_EOF;
> > @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> > bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
> >
> > /* Update the descriptor. */
> > + rx_desc_clear(s->rx_desc[q]);
> > +
> > if (first_desc) {
> > rx_desc_set_sof(s->rx_desc[q]);
> > first_desc = false;
>
>
>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 11:01 ` Ramon Fried
0 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 11:01 UTC (permalink / raw)
To: Jason Wang
Cc: Peter Maydell, qemu-trivial, Alistair Francis, qemu-devel,
open list:Xilinx Zynq, Edgar E. Iglesias
On Tue, Jul 16, 2019 at 11:42 AM Jason Wang <jasowang@redhat.com> wrote:
>
>
> On 2019/6/15 下午1:17, Ramon Fried wrote:
> > The RX ring descriptors control field is used for setting
> > SOF and EOF (start of frame and end of frame).
> > The SOF and EOF weren't cleared from the previous descriptors,
> > causing inconsistencies in ring buffer.
> > Fix that by clearing the control field of every descriptors we're
> > processing.
> >
> > Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> > ---
> > hw/net/cadence_gem.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> > index ecee22525c..d83a82bdb0 100644
> > --- a/hw/net/cadence_gem.c
> > +++ b/hw/net/cadence_gem.c
> > @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> > desc[1] |= DESC_1_RX_SOF;
> > }
> >
> > +static inline void rx_desc_clear(uint32_t *desc)
>
>
> Nit: is this better to name this as "rx_desc_clear_control()" ?
I agree, sent v2.
>
> Thanks
>
>
> > +{
> > + desc[1] = 0;
> > +}
> > +
> > static inline void rx_desc_set_eof(uint32_t *desc)
> > {
> > desc[1] |= DESC_1_RX_EOF;
> > @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> > bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
> >
> > /* Update the descriptor. */
> > + rx_desc_clear(s->rx_desc[q]);
> > +
> > if (first_desc) {
> > rx_desc_set_sof(s->rx_desc[q]);
> > first_desc = false;
>
>
>
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Qemu-arm] [Qemu-devel] [PATCH] net: cadence_gem: clear RX control descriptor
@ 2019-07-16 11:01 ` Ramon Fried
0 siblings, 0 replies; 17+ messages in thread
From: Ramon Fried @ 2019-07-16 11:01 UTC (permalink / raw)
To: Jason Wang
Cc: Peter Maydell, qemu-trivial, Alistair Francis, qemu-devel,
open list:Xilinx Zynq
On Tue, Jul 16, 2019 at 11:42 AM Jason Wang <jasowang@redhat.com> wrote:
>
>
> On 2019/6/15 下午1:17, Ramon Fried wrote:
> > The RX ring descriptors control field is used for setting
> > SOF and EOF (start of frame and end of frame).
> > The SOF and EOF weren't cleared from the previous descriptors,
> > causing inconsistencies in ring buffer.
> > Fix that by clearing the control field of every descriptors we're
> > processing.
> >
> > Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
> > ---
> > hw/net/cadence_gem.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> > index ecee22525c..d83a82bdb0 100644
> > --- a/hw/net/cadence_gem.c
> > +++ b/hw/net/cadence_gem.c
> > @@ -406,6 +406,11 @@ static inline void rx_desc_set_sof(uint32_t *desc)
> > desc[1] |= DESC_1_RX_SOF;
> > }
> >
> > +static inline void rx_desc_clear(uint32_t *desc)
>
>
> Nit: is this better to name this as "rx_desc_clear_control()" ?
I agree, sent v2.
>
> Thanks
>
>
> > +{
> > + desc[1] = 0;
> > +}
> > +
> > static inline void rx_desc_set_eof(uint32_t *desc)
> > {
> > desc[1] |= DESC_1_RX_EOF;
> > @@ -994,6 +999,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
> > bytes_to_copy -= MIN(bytes_to_copy, rxbufsize);
> >
> > /* Update the descriptor. */
> > + rx_desc_clear(s->rx_desc[q]);
> > +
> > if (first_desc) {
> > rx_desc_set_sof(s->rx_desc[q]);
> > first_desc = false;
>
>
>
^ permalink raw reply [flat|nested] 17+ messages in thread