* [PATCH] EDAC/altera: Silence an endian warning
@ 2019-06-24 13:47 ` Dan Carpenter
0 siblings, 0 replies; 6+ messages in thread
From: Dan Carpenter @ 2019-06-24 13:47 UTC (permalink / raw)
To: Thor Thayer
Cc: Borislav Petkov, Mauro Carvalho Chehab, James Morse, linux-edac,
kernel-janitors
Smatch complains that we're casting a u32 pointer to unsigned long.
drivers/edac/altera_edac.c:1878 altr_edac_a10_irq_handler()
warn: passing casted pointer '&irq_status' to 'find_first_bit()'
This code wouldn't work on a 64 bit big endian system because we would
read past the end of &irq_status.
Fixes: 13ab8448d2c9 ("EDAC, altera: Add ECC Manager IRQ controller support")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
---
Static analysis obviously and I don't know this subsystem at all.
Probably we're never going to run this on a 64 bit big endian system...
Feel free to ignore this if you want.
drivers/edac/altera_edac.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index c2e693e34d43..bf024ec0116c 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -1866,6 +1866,7 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
int irq = irq_desc_get_irq(desc);
+ unsigned long bits;
dberr = (irq = edac->db_irq) ? 1 : 0;
sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
@@ -1875,7 +1876,8 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);
- for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {
+ bits = irq_status;
+ for_each_set_bit(bit, &bits, 32) {
irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);
if (irq)
generic_handle_irq(irq);
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH] EDAC/altera: Silence an endian warning
@ 2019-06-24 13:47 ` Dan Carpenter
0 siblings, 0 replies; 6+ messages in thread
From: Dan Carpenter @ 2019-06-24 13:47 UTC (permalink / raw)
To: Thor Thayer
Cc: Borislav Petkov, Mauro Carvalho Chehab, James Morse, linux-edac,
kernel-janitors
Smatch complains that we're casting a u32 pointer to unsigned long.
drivers/edac/altera_edac.c:1878 altr_edac_a10_irq_handler()
warn: passing casted pointer '&irq_status' to 'find_first_bit()'
This code wouldn't work on a 64 bit big endian system because we would
read past the end of &irq_status.
Fixes: 13ab8448d2c9 ("EDAC, altera: Add ECC Manager IRQ controller support")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
---
Static analysis obviously and I don't know this subsystem at all.
Probably we're never going to run this on a 64 bit big endian system...
Feel free to ignore this if you want.
drivers/edac/altera_edac.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
index c2e693e34d43..bf024ec0116c 100644
--- a/drivers/edac/altera_edac.c
+++ b/drivers/edac/altera_edac.c
@@ -1866,6 +1866,7 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
int irq = irq_desc_get_irq(desc);
+ unsigned long bits;
dberr = (irq == edac->db_irq) ? 1 : 0;
sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
@@ -1875,7 +1876,8 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);
- for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {
+ bits = irq_status;
+ for_each_set_bit(bit, &bits, 32) {
irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);
if (irq)
generic_handle_irq(irq);
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH] EDAC/altera: Silence an endian warning
2019-06-24 13:47 ` Dan Carpenter
@ 2019-06-24 20:27 ` Thor Thayer
-1 siblings, 0 replies; 6+ messages in thread
From: Thor Thayer @ 2019-06-24 20:27 UTC (permalink / raw)
To: Dan Carpenter
Cc: Borislav Petkov, Mauro Carvalho Chehab, James Morse, linux-edac,
kernel-janitors
Hi Dan,
On 6/24/19 8:47 AM, Dan Carpenter wrote:
> Smatch complains that we're casting a u32 pointer to unsigned long.
>
> drivers/edac/altera_edac.c:1878 altr_edac_a10_irq_handler()
> warn: passing casted pointer '&irq_status' to 'find_first_bit()'
>
> This code wouldn't work on a 64 bit big endian system because we would
> read past the end of &irq_status.
>
> Fixes: 13ab8448d2c9 ("EDAC, altera: Add ECC Manager IRQ controller support")
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
> ---
> Static analysis obviously and I don't know this subsystem at all.
> Probably we're never going to run this on a 64 bit big endian system...
> Feel free to ignore this if you want.
>
> drivers/edac/altera_edac.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> index c2e693e34d43..bf024ec0116c 100644
> --- a/drivers/edac/altera_edac.c
> +++ b/drivers/edac/altera_edac.c
> @@ -1866,6 +1866,7 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
> struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);
> struct irq_chip *chip = irq_desc_get_chip(desc);
> int irq = irq_desc_get_irq(desc);
> + unsigned long bits;
>
> dberr = (irq = edac->db_irq) ? 1 : 0;
> sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
> @@ -1875,7 +1876,8 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
>
> regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);
>
> - for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {
> + bits = irq_status;
> + for_each_set_bit(bit, &bits, 32) {
> irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);
> if (irq)
> generic_handle_irq(irq);
>
You are correct that we shouldn't use this on a 64 bit machine but this
is a good fix. Thank you!
Reviewed-by: Thor Thayer <thor.thayer@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] EDAC/altera: Silence an endian warning
@ 2019-06-24 20:27 ` Thor Thayer
0 siblings, 0 replies; 6+ messages in thread
From: Thor Thayer @ 2019-06-24 20:27 UTC (permalink / raw)
To: Dan Carpenter
Cc: Borislav Petkov, Mauro Carvalho Chehab, James Morse, linux-edac,
kernel-janitors
Hi Dan,
On 6/24/19 8:47 AM, Dan Carpenter wrote:
> Smatch complains that we're casting a u32 pointer to unsigned long.
>
> drivers/edac/altera_edac.c:1878 altr_edac_a10_irq_handler()
> warn: passing casted pointer '&irq_status' to 'find_first_bit()'
>
> This code wouldn't work on a 64 bit big endian system because we would
> read past the end of &irq_status.
>
> Fixes: 13ab8448d2c9 ("EDAC, altera: Add ECC Manager IRQ controller support")
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
> ---
> Static analysis obviously and I don't know this subsystem at all.
> Probably we're never going to run this on a 64 bit big endian system...
> Feel free to ignore this if you want.
>
> drivers/edac/altera_edac.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> index c2e693e34d43..bf024ec0116c 100644
> --- a/drivers/edac/altera_edac.c
> +++ b/drivers/edac/altera_edac.c
> @@ -1866,6 +1866,7 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
> struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);
> struct irq_chip *chip = irq_desc_get_chip(desc);
> int irq = irq_desc_get_irq(desc);
> + unsigned long bits;
>
> dberr = (irq == edac->db_irq) ? 1 : 0;
> sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
> @@ -1875,7 +1876,8 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
>
> regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);
>
> - for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {
> + bits = irq_status;
> + for_each_set_bit(bit, &bits, 32) {
> irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);
> if (irq)
> generic_handle_irq(irq);
>
You are correct that we shouldn't use this on a 64 bit machine but this
is a good fix. Thank you!
Reviewed-by: Thor Thayer <thor.thayer@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] EDAC/altera: Silence an endian warning
2019-06-24 20:27 ` Thor Thayer
@ 2019-08-07 8:46 ` Borislav Petkov
-1 siblings, 0 replies; 6+ messages in thread
From: Borislav Petkov @ 2019-08-07 8:46 UTC (permalink / raw)
To: Thor Thayer
Cc: Dan Carpenter, Mauro Carvalho Chehab, James Morse, linux-edac,
kernel-janitors
On Mon, Jun 24, 2019 at 03:27:55PM -0500, Thor Thayer wrote:
> Hi Dan,
>
> On 6/24/19 8:47 AM, Dan Carpenter wrote:
> > Smatch complains that we're casting a u32 pointer to unsigned long.
> >
> > drivers/edac/altera_edac.c:1878 altr_edac_a10_irq_handler()
> > warn: passing casted pointer '&irq_status' to 'find_first_bit()'
> >
> > This code wouldn't work on a 64 bit big endian system because we would
> > read past the end of &irq_status.
> >
> > Fixes: 13ab8448d2c9 ("EDAC, altera: Add ECC Manager IRQ controller support")
> > Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
> > ---
> > Static analysis obviously and I don't know this subsystem at all.
> > Probably we're never going to run this on a 64 bit big endian system...
> > Feel free to ignore this if you want.
> >
> > drivers/edac/altera_edac.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> > index c2e693e34d43..bf024ec0116c 100644
> > --- a/drivers/edac/altera_edac.c
> > +++ b/drivers/edac/altera_edac.c
> > @@ -1866,6 +1866,7 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
> > struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);
> > struct irq_chip *chip = irq_desc_get_chip(desc);
> > int irq = irq_desc_get_irq(desc);
> > + unsigned long bits;
> > dberr = (irq = edac->db_irq) ? 1 : 0;
> > sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
> > @@ -1875,7 +1876,8 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
> > regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);
> > - for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {
> > + bits = irq_status;
> > + for_each_set_bit(bit, &bits, 32) {
> > irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);
> > if (irq)
> > generic_handle_irq(irq);
> >
> You are correct that we shouldn't use this on a 64 bit machine but this is a
> good fix. Thank you!
>
> Reviewed-by: Thor Thayer <thor.thayer@linux.intel.com>
Applied, thanks.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] EDAC/altera: Silence an endian warning
@ 2019-08-07 8:46 ` Borislav Petkov
0 siblings, 0 replies; 6+ messages in thread
From: Borislav Petkov @ 2019-08-07 8:46 UTC (permalink / raw)
To: Thor Thayer
Cc: Dan Carpenter, Mauro Carvalho Chehab, James Morse, linux-edac,
kernel-janitors
On Mon, Jun 24, 2019 at 03:27:55PM -0500, Thor Thayer wrote:
> Hi Dan,
>
> On 6/24/19 8:47 AM, Dan Carpenter wrote:
> > Smatch complains that we're casting a u32 pointer to unsigned long.
> >
> > drivers/edac/altera_edac.c:1878 altr_edac_a10_irq_handler()
> > warn: passing casted pointer '&irq_status' to 'find_first_bit()'
> >
> > This code wouldn't work on a 64 bit big endian system because we would
> > read past the end of &irq_status.
> >
> > Fixes: 13ab8448d2c9 ("EDAC, altera: Add ECC Manager IRQ controller support")
> > Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
> > ---
> > Static analysis obviously and I don't know this subsystem at all.
> > Probably we're never going to run this on a 64 bit big endian system...
> > Feel free to ignore this if you want.
> >
> > drivers/edac/altera_edac.c | 4 +++-
> > 1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
> > index c2e693e34d43..bf024ec0116c 100644
> > --- a/drivers/edac/altera_edac.c
> > +++ b/drivers/edac/altera_edac.c
> > @@ -1866,6 +1866,7 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
> > struct altr_arria10_edac *edac = irq_desc_get_handler_data(desc);
> > struct irq_chip *chip = irq_desc_get_chip(desc);
> > int irq = irq_desc_get_irq(desc);
> > + unsigned long bits;
> > dberr = (irq == edac->db_irq) ? 1 : 0;
> > sm_offset = dberr ? A10_SYSMGR_ECC_INTSTAT_DERR_OFST :
> > @@ -1875,7 +1876,8 @@ static void altr_edac_a10_irq_handler(struct irq_desc *desc)
> > regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status);
> > - for_each_set_bit(bit, (unsigned long *)&irq_status, 32) {
> > + bits = irq_status;
> > + for_each_set_bit(bit, &bits, 32) {
> > irq = irq_linear_revmap(edac->domain, dberr * 32 + bit);
> > if (irq)
> > generic_handle_irq(irq);
> >
> You are correct that we shouldn't use this on a 64 bit machine but this is a
> good fix. Thank you!
>
> Reviewed-by: Thor Thayer <thor.thayer@linux.intel.com>
Applied, thanks.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-08-07 8:46 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-06-24 13:47 [PATCH] EDAC/altera: Silence an endian warning Dan Carpenter
2019-06-24 13:47 ` Dan Carpenter
2019-06-24 20:27 ` Thor Thayer
2019-06-24 20:27 ` Thor Thayer
2019-08-07 8:46 ` Borislav Petkov
2019-08-07 8:46 ` Borislav Petkov
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.