* [PATCHv2 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver. @ 2019-06-26 11:11 ` Xiaowei Bao 0 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-26 11:11 UTC (permalink / raw) To: bhelgaas, robh+dt, mark.rutland, shawnguo, leoyang.li, kishon, lorenzo.pieralisi, arnd, gregkh, minghuan.Lian, mingkai.hu, roy.zang, kstewart, pombredanne, shawn.lin, linux-pci, devicetree, linux-kernel, linux-arm-kernel, linuxppc-dev Cc: Xiaowei Bao The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware, so set the bar_fixed_64bit with 0x14. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- v2: - Replace value 0x14 with a macro. drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c index be61d96..227c33b 100644 --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c @@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie *pci) .linkup_notifier = false, .msi_capable = true, .msix_capable = false, + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4), }; static const struct pci_epc_features* -- 1.7.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCHv2 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver. @ 2019-06-26 11:11 ` Xiaowei Bao 0 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-26 11:11 UTC (permalink / raw) To: bhelgaas, robh+dt, mark.rutland, shawnguo, leoyang.li, kishon, lorenzo.pieralisi, arnd, gregkh, minghuan.Lian, mingkai.hu, roy.zang, kstewart, pombredanne, shawn.lin, linux-pci, devicetree, linux-kernel, linux-arm-kernel, linuxppc-dev Cc: Xiaowei Bao The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware, so set the bar_fixed_64bit with 0x14. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- v2: - Replace value 0x14 with a macro. drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c index be61d96..227c33b 100644 --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c @@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie *pci) .linkup_notifier = false, .msi_capable = true, .msix_capable = false, + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4), }; static const struct pci_epc_features* -- 1.7.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately 2019-06-26 11:11 ` Xiaowei Bao @ 2019-06-26 11:11 ` Xiaowei Bao -1 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-26 11:11 UTC (permalink / raw) To: bhelgaas, robh+dt, mark.rutland, shawnguo, leoyang.li, kishon, lorenzo.pieralisi, arnd, gregkh, minghuan.Lian, mingkai.hu, roy.zang, kstewart, pombredanne, shawn.lin, linux-pci, devicetree, linux-kernel, linux-arm-kernel, linuxppc-dev Cc: Xiaowei Bao Compile the EP and RC drivers separately with different configuration options, this looks clearer. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- v2: - No change. drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- drivers/pci/controller/dwc/Makefile | 3 ++- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index a6ce1ee..a41ccf5 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP DesignWare core functions to implement the driver. config PCI_LAYERSCAPE - bool "Freescale Layerscape PCIe controller" + bool "Freescale Layerscape PCIe controller - Host mode" depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) depends on PCI_MSI_IRQ_DOMAIN select MFD_SYSCON select PCIE_DW_HOST help - Say Y here if you want PCIe controller support on Layerscape SoCs. + Say Y here if you want to enable PCIe controller support on Layerscape + SoCs to work in Host mode. + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] + determines which PCIe controller works in EP mode and which PCIe + controller works in RC mode. + +config PCI_LAYERSCAPE_EP + bool "Freescale Layerscape PCIe controller - Endpoint mode" + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) + depends on PCI_ENDPOINT + select PCIE_DW_EP + help + Say Y here if you want to enable PCIe controller support on Layerscape + SoCs to work in Endpoint mode. + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] + determines which PCIe controller works in EP mode and which PCIe + controller works in RC mode. config PCI_HISI depends on OF && (ARM64 || COMPILE_TEST) diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile index b085dfd..824fde7 100644 --- a/drivers/pci/controller/dwc/Makefile +++ b/drivers/pci/controller/dwc/Makefile @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o obj-$(CONFIG_PCI_IMX6) += pci-imx6.o obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o -- 1.7.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately @ 2019-06-26 11:11 ` Xiaowei Bao 0 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-26 11:11 UTC (permalink / raw) To: bhelgaas, robh+dt, mark.rutland, shawnguo, leoyang.li, kishon, lorenzo.pieralisi, arnd, gregkh, minghuan.Lian, mingkai.hu, roy.zang, kstewart, pombredanne, shawn.lin, linux-pci, devicetree, linux-kernel, linux-arm-kernel, linuxppc-dev Cc: Xiaowei Bao Compile the EP and RC drivers separately with different configuration options, this looks clearer. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- v2: - No change. drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- drivers/pci/controller/dwc/Makefile | 3 ++- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index a6ce1ee..a41ccf5 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP DesignWare core functions to implement the driver. config PCI_LAYERSCAPE - bool "Freescale Layerscape PCIe controller" + bool "Freescale Layerscape PCIe controller - Host mode" depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) depends on PCI_MSI_IRQ_DOMAIN select MFD_SYSCON select PCIE_DW_HOST help - Say Y here if you want PCIe controller support on Layerscape SoCs. + Say Y here if you want to enable PCIe controller support on Layerscape + SoCs to work in Host mode. + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] + determines which PCIe controller works in EP mode and which PCIe + controller works in RC mode. + +config PCI_LAYERSCAPE_EP + bool "Freescale Layerscape PCIe controller - Endpoint mode" + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) + depends on PCI_ENDPOINT + select PCIE_DW_EP + help + Say Y here if you want to enable PCIe controller support on Layerscape + SoCs to work in Endpoint mode. + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] + determines which PCIe controller works in EP mode and which PCIe + controller works in RC mode. config PCI_HISI depends on OF && (ARM64 || COMPILE_TEST) diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile index b085dfd..824fde7 100644 --- a/drivers/pci/controller/dwc/Makefile +++ b/drivers/pci/controller/dwc/Makefile @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o obj-$(CONFIG_PCI_IMX6) += pci-imx6.o obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o -- 1.7.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately 2019-06-26 11:11 ` Xiaowei Bao (?) @ 2019-06-26 17:51 ` Bjorn Helgaas -1 siblings, 0 replies; 11+ messages in thread From: Bjorn Helgaas @ 2019-06-26 17:51 UTC (permalink / raw) To: Xiaowei Bao Cc: robh+dt, mark.rutland, shawnguo, leoyang.li, kishon, lorenzo.pieralisi, arnd, gregkh, minghuan.Lian, mingkai.hu, roy.zang, kstewart, pombredanne, shawn.lin, linux-pci, devicetree, linux-kernel, linux-arm-kernel, linuxppc-dev If you post another revision for any reason, please change the subject so it's worded as a command and mentions the new config options, e.g., PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > Compile the EP and RC drivers separately with different configuration > options, this looks clearer. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > --- > v2: > - No change. > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > drivers/pci/controller/dwc/Makefile | 3 ++- > 2 files changed, 20 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig > index a6ce1ee..a41ccf5 100644 > --- a/drivers/pci/controller/dwc/Kconfig > +++ b/drivers/pci/controller/dwc/Kconfig > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > DesignWare core functions to implement the driver. > > config PCI_LAYERSCAPE > - bool "Freescale Layerscape PCIe controller" > + bool "Freescale Layerscape PCIe controller - Host mode" > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > depends on PCI_MSI_IRQ_DOMAIN > select MFD_SYSCON > select PCIE_DW_HOST > help > - Say Y here if you want PCIe controller support on Layerscape SoCs. > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Host mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > + > +config PCI_LAYERSCAPE_EP > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > + depends on PCI_ENDPOINT > + select PCIE_DW_EP > + help > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Endpoint mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > > config PCI_HISI > depends on OF && (ARM64 || COMPILE_TEST) > diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile > index b085dfd..824fde7 100644 > --- a/drivers/pci/controller/dwc/Makefile > +++ b/drivers/pci/controller/dwc/Makefile > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > -- > 1.7.1 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately @ 2019-06-26 17:51 ` Bjorn Helgaas 0 siblings, 0 replies; 11+ messages in thread From: Bjorn Helgaas @ 2019-06-26 17:51 UTC (permalink / raw) To: Xiaowei Bao Cc: mark.rutland, roy.zang, lorenzo.pieralisi, arnd, devicetree, gregkh, kstewart, linuxppc-dev, linux-pci, linux-kernel, kishon, minghuan.Lian, robh+dt, linux-arm-kernel, pombredanne, leoyang.li, shawnguo, shawn.lin, mingkai.hu If you post another revision for any reason, please change the subject so it's worded as a command and mentions the new config options, e.g., PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > Compile the EP and RC drivers separately with different configuration > options, this looks clearer. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > --- > v2: > - No change. > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > drivers/pci/controller/dwc/Makefile | 3 ++- > 2 files changed, 20 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig > index a6ce1ee..a41ccf5 100644 > --- a/drivers/pci/controller/dwc/Kconfig > +++ b/drivers/pci/controller/dwc/Kconfig > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > DesignWare core functions to implement the driver. > > config PCI_LAYERSCAPE > - bool "Freescale Layerscape PCIe controller" > + bool "Freescale Layerscape PCIe controller - Host mode" > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > depends on PCI_MSI_IRQ_DOMAIN > select MFD_SYSCON > select PCIE_DW_HOST > help > - Say Y here if you want PCIe controller support on Layerscape SoCs. > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Host mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > + > +config PCI_LAYERSCAPE_EP > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > + depends on PCI_ENDPOINT > + select PCIE_DW_EP > + help > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Endpoint mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > > config PCI_HISI > depends on OF && (ARM64 || COMPILE_TEST) > diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile > index b085dfd..824fde7 100644 > --- a/drivers/pci/controller/dwc/Makefile > +++ b/drivers/pci/controller/dwc/Makefile > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > -- > 1.7.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately @ 2019-06-26 17:51 ` Bjorn Helgaas 0 siblings, 0 replies; 11+ messages in thread From: Bjorn Helgaas @ 2019-06-26 17:51 UTC (permalink / raw) To: Xiaowei Bao Cc: mark.rutland, roy.zang, lorenzo.pieralisi, arnd, devicetree, gregkh, kstewart, linuxppc-dev, linux-pci, linux-kernel, kishon, minghuan.Lian, robh+dt, linux-arm-kernel, pombredanne, leoyang.li, shawnguo, shawn.lin, mingkai.hu If you post another revision for any reason, please change the subject so it's worded as a command and mentions the new config options, e.g., PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > Compile the EP and RC drivers separately with different configuration > options, this looks clearer. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > --- > v2: > - No change. > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > drivers/pci/controller/dwc/Makefile | 3 ++- > 2 files changed, 20 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig > index a6ce1ee..a41ccf5 100644 > --- a/drivers/pci/controller/dwc/Kconfig > +++ b/drivers/pci/controller/dwc/Kconfig > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > DesignWare core functions to implement the driver. > > config PCI_LAYERSCAPE > - bool "Freescale Layerscape PCIe controller" > + bool "Freescale Layerscape PCIe controller - Host mode" > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > depends on PCI_MSI_IRQ_DOMAIN > select MFD_SYSCON > select PCIE_DW_HOST > help > - Say Y here if you want PCIe controller support on Layerscape SoCs. > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Host mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > + > +config PCI_LAYERSCAPE_EP > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > + depends on PCI_ENDPOINT > + select PCIE_DW_EP > + help > + Say Y here if you want to enable PCIe controller support on Layerscape > + SoCs to work in Endpoint mode. > + This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] > + determines which PCIe controller works in EP mode and which PCIe > + controller works in RC mode. > > config PCI_HISI > depends on OF && (ARM64 || COMPILE_TEST) > diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile > index b085dfd..824fde7 100644 > --- a/drivers/pci/controller/dwc/Makefile > +++ b/drivers/pci/controller/dwc/Makefile > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > -- > 1.7.1 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately 2019-06-26 17:51 ` Bjorn Helgaas (?) (?) @ 2019-06-27 2:00 ` Xiaowei Bao -1 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-27 2:00 UTC (permalink / raw) To: Bjorn Helgaas Cc: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, Leo Li, kishon@ti.com, lorenzo.pieralisi@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, M.h. Lian, Mingkai Hu, Roy Zang, kstewart@linuxfoundation.org, pombredanne@nexb.com, shawn.lin@rock-chips.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org Hi Bjorn, > -----Original Message----- > From: Bjorn Helgaas <helgaas@kernel.org> > Sent: 2019年6月27日 1:52 > To: Xiaowei Bao <xiaowei.bao@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; > arnd@arndb.de; gregkh@linuxfoundation.org; M.h. Lian > <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy Zang > <roy.zang@nxp.com>; kstewart@linuxfoundation.org; > pombredanne@nexb.com; shawn.lin@rock-chips.com; > linux-pci@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linuxppc-dev@lists.ozlabs.org > Subject: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are > compiled separately > > Caution: EXT Email > > If you post another revision for any reason, please change the subject so it's > worded as a command and mentions the new config options, e.g., > > PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC > separately [Xiaowei Bao] OK, thanks, this subject looks well. > > On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > > Compile the EP and RC drivers separately with different configuration > > options, this looks clearer. > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > --- > > v2: > > - No change. > > > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > > drivers/pci/controller/dwc/Makefile | 3 ++- > > 2 files changed, 20 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/Kconfig > > b/drivers/pci/controller/dwc/Kconfig > > index a6ce1ee..a41ccf5 100644 > > --- a/drivers/pci/controller/dwc/Kconfig > > +++ b/drivers/pci/controller/dwc/Kconfig > > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > > DesignWare core functions to implement the driver. > > > > config PCI_LAYERSCAPE > > - bool "Freescale Layerscape PCIe controller" > > + bool "Freescale Layerscape PCIe controller - Host mode" > > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > depends on PCI_MSI_IRQ_DOMAIN > > select MFD_SYSCON > > select PCIE_DW_HOST > > help > > - Say Y here if you want PCIe controller support on Layerscape SoCs. > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Host mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > + > > +config PCI_LAYERSCAPE_EP > > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > + depends on PCI_ENDPOINT > > + select PCIE_DW_EP > > + help > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Endpoint mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > > > config PCI_HISI > > depends on OF && (ARM64 || COMPILE_TEST) diff --git > > a/drivers/pci/controller/dwc/Makefile > > b/drivers/pci/controller/dwc/Makefile > > index b085dfd..824fde7 100644 > > --- a/drivers/pci/controller/dwc/Makefile > > +++ b/drivers/pci/controller/dwc/Makefile > > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > > -- > > 1.7.1 > > ^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately @ 2019-06-27 2:00 ` Xiaowei Bao 0 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-27 2:00 UTC (permalink / raw) To: Bjorn Helgaas Cc: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, Leo Li, kishon@ti.com, lorenzo.pieralisi@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, M.h. Lian, Mingkai Hu, Roy Zang, kstewart@linuxfoundation.org, pombredanne@nexb.com, shawn.lin@rock-chips.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Hi Bjorn, > -----Original Message----- > From: Bjorn Helgaas <helgaas@kernel.org> > Sent: 2019年6月27日 1:52 > To: Xiaowei Bao <xiaowei.bao@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; > arnd@arndb.de; gregkh@linuxfoundation.org; M.h. Lian > <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy Zang > <roy.zang@nxp.com>; kstewart@linuxfoundation.org; > pombredanne@nexb.com; shawn.lin@rock-chips.com; > linux-pci@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linuxppc-dev@lists.ozlabs.org > Subject: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are > compiled separately > > Caution: EXT Email > > If you post another revision for any reason, please change the subject so it's > worded as a command and mentions the new config options, e.g., > > PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC > separately [Xiaowei Bao] OK, thanks, this subject looks well. > > On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > > Compile the EP and RC drivers separately with different configuration > > options, this looks clearer. > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > --- > > v2: > > - No change. > > > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > > drivers/pci/controller/dwc/Makefile | 3 ++- > > 2 files changed, 20 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/Kconfig > > b/drivers/pci/controller/dwc/Kconfig > > index a6ce1ee..a41ccf5 100644 > > --- a/drivers/pci/controller/dwc/Kconfig > > +++ b/drivers/pci/controller/dwc/Kconfig > > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > > DesignWare core functions to implement the driver. > > > > config PCI_LAYERSCAPE > > - bool "Freescale Layerscape PCIe controller" > > + bool "Freescale Layerscape PCIe controller - Host mode" > > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > depends on PCI_MSI_IRQ_DOMAIN > > select MFD_SYSCON > > select PCIE_DW_HOST > > help > > - Say Y here if you want PCIe controller support on Layerscape SoCs. > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Host mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > + > > +config PCI_LAYERSCAPE_EP > > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > + depends on PCI_ENDPOINT > > + select PCIE_DW_EP > > + help > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Endpoint mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > > > config PCI_HISI > > depends on OF && (ARM64 || COMPILE_TEST) diff --git > > a/drivers/pci/controller/dwc/Makefile > > b/drivers/pci/controller/dwc/Makefile > > index b085dfd..824fde7 100644 > > --- a/drivers/pci/controller/dwc/Makefile > > +++ b/drivers/pci/controller/dwc/Makefile > > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > > -- > > 1.7.1 > > ^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately @ 2019-06-27 2:00 ` Xiaowei Bao 0 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-27 2:00 UTC (permalink / raw) To: Bjorn Helgaas Cc: mark.rutland@arm.com, Roy Zang, lorenzo.pieralisi@arm.com, arnd@arndb.de, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, kstewart@linuxfoundation.org, linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kishon@ti.com, M.h. Lian, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, pombredanne@nexb.com, Leo Li, shawnguo@kernel.org, shawn.lin@rock-chips.com, Mingkai Hu Hi Bjorn, > -----Original Message----- > From: Bjorn Helgaas <helgaas@kernel.org> > Sent: 2019年6月27日 1:52 > To: Xiaowei Bao <xiaowei.bao@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; > arnd@arndb.de; gregkh@linuxfoundation.org; M.h. Lian > <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy Zang > <roy.zang@nxp.com>; kstewart@linuxfoundation.org; > pombredanne@nexb.com; shawn.lin@rock-chips.com; > linux-pci@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linuxppc-dev@lists.ozlabs.org > Subject: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are > compiled separately > > Caution: EXT Email > > If you post another revision for any reason, please change the subject so it's > worded as a command and mentions the new config options, e.g., > > PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC > separately [Xiaowei Bao] OK, thanks, this subject looks well. > > On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > > Compile the EP and RC drivers separately with different configuration > > options, this looks clearer. > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > --- > > v2: > > - No change. > > > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > > drivers/pci/controller/dwc/Makefile | 3 ++- > > 2 files changed, 20 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/Kconfig > > b/drivers/pci/controller/dwc/Kconfig > > index a6ce1ee..a41ccf5 100644 > > --- a/drivers/pci/controller/dwc/Kconfig > > +++ b/drivers/pci/controller/dwc/Kconfig > > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > > DesignWare core functions to implement the driver. > > > > config PCI_LAYERSCAPE > > - bool "Freescale Layerscape PCIe controller" > > + bool "Freescale Layerscape PCIe controller - Host mode" > > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > depends on PCI_MSI_IRQ_DOMAIN > > select MFD_SYSCON > > select PCIE_DW_HOST > > help > > - Say Y here if you want PCIe controller support on Layerscape SoCs. > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Host mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > + > > +config PCI_LAYERSCAPE_EP > > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > + depends on PCI_ENDPOINT > > + select PCIE_DW_EP > > + help > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Endpoint mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > > > config PCI_HISI > > depends on OF && (ARM64 || COMPILE_TEST) diff --git > > a/drivers/pci/controller/dwc/Makefile > > b/drivers/pci/controller/dwc/Makefile > > index b085dfd..824fde7 100644 > > --- a/drivers/pci/controller/dwc/Makefile > > +++ b/drivers/pci/controller/dwc/Makefile > > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > > -- > > 1.7.1 > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately @ 2019-06-27 2:00 ` Xiaowei Bao 0 siblings, 0 replies; 11+ messages in thread From: Xiaowei Bao @ 2019-06-27 2:00 UTC (permalink / raw) To: Bjorn Helgaas Cc: mark.rutland@arm.com, Roy Zang, lorenzo.pieralisi@arm.com, arnd@arndb.de, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, kstewart@linuxfoundation.org, linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kishon@ti.com, M.h. Lian, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, pombredanne@nexb.com, Leo Li, shawnguo@kernel.org, shawn.lin@rock-chips.com, Mingkai Hu Hi Bjorn, > -----Original Message----- > From: Bjorn Helgaas <helgaas@kernel.org> > Sent: 2019年6月27日 1:52 > To: Xiaowei Bao <xiaowei.bao@nxp.com> > Cc: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; Leo > Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; > arnd@arndb.de; gregkh@linuxfoundation.org; M.h. Lian > <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy Zang > <roy.zang@nxp.com>; kstewart@linuxfoundation.org; > pombredanne@nexb.com; shawn.lin@rock-chips.com; > linux-pci@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linuxppc-dev@lists.ozlabs.org > Subject: [EXT] Re: [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are > compiled separately > > Caution: EXT Email > > If you post another revision for any reason, please change the subject so it's > worded as a command and mentions the new config options, e.g., > > PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC > separately [Xiaowei Bao] OK, thanks, this subject looks well. > > On Wed, Jun 26, 2019 at 07:11:39PM +0800, Xiaowei Bao wrote: > > Compile the EP and RC drivers separately with different configuration > > options, this looks clearer. > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > --- > > v2: > > - No change. > > > > drivers/pci/controller/dwc/Kconfig | 20 ++++++++++++++++++-- > > drivers/pci/controller/dwc/Makefile | 3 ++- > > 2 files changed, 20 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/Kconfig > > b/drivers/pci/controller/dwc/Kconfig > > index a6ce1ee..a41ccf5 100644 > > --- a/drivers/pci/controller/dwc/Kconfig > > +++ b/drivers/pci/controller/dwc/Kconfig > > @@ -131,13 +131,29 @@ config PCI_KEYSTONE_EP > > DesignWare core functions to implement the driver. > > > > config PCI_LAYERSCAPE > > - bool "Freescale Layerscape PCIe controller" > > + bool "Freescale Layerscape PCIe controller - Host mode" > > depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > depends on PCI_MSI_IRQ_DOMAIN > > select MFD_SYSCON > > select PCIE_DW_HOST > > help > > - Say Y here if you want PCIe controller support on Layerscape SoCs. > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Host mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > + > > +config PCI_LAYERSCAPE_EP > > + bool "Freescale Layerscape PCIe controller - Endpoint mode" > > + depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) > > + depends on PCI_ENDPOINT > > + select PCIE_DW_EP > > + help > > + Say Y here if you want to enable PCIe controller support on > Layerscape > > + SoCs to work in Endpoint mode. > > + This controller can work either as EP or RC. The > RCW[HOST_AGT_PEX] > > + determines which PCIe controller works in EP mode and which > PCIe > > + controller works in RC mode. > > > > config PCI_HISI > > depends on OF && (ARM64 || COMPILE_TEST) diff --git > > a/drivers/pci/controller/dwc/Makefile > > b/drivers/pci/controller/dwc/Makefile > > index b085dfd..824fde7 100644 > > --- a/drivers/pci/controller/dwc/Makefile > > +++ b/drivers/pci/controller/dwc/Makefile > > @@ -8,7 +8,8 @@ obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o > > obj-$(CONFIG_PCI_IMX6) += pci-imx6.o > > obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o > > obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone.o > > -obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o pci-layerscape-ep.o > > +obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o > > +obj-$(CONFIG_PCI_LAYERSCAPE_EP) += pci-layerscape-ep.o > > obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o > > obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o > > obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o > > -- > > 1.7.1 > > ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2019-06-27 6:51 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-06-26 11:11 [PATCHv2 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver Xiaowei Bao 2019-06-26 11:11 ` Xiaowei Bao 2019-06-26 11:11 ` [PATCHv2 2/2] PCI: layerscape: EP and RC drivers are compiled separately Xiaowei Bao 2019-06-26 11:11 ` Xiaowei Bao 2019-06-26 17:51 ` Bjorn Helgaas 2019-06-26 17:51 ` Bjorn Helgaas 2019-06-26 17:51 ` Bjorn Helgaas 2019-06-27 2:00 ` [EXT] " Xiaowei Bao 2019-06-27 2:00 ` Xiaowei Bao 2019-06-27 2:00 ` Xiaowei Bao 2019-06-27 2:00 ` Xiaowei Bao
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