* Re: KVM works on RPi4
@ 2019-06-30 10:18 ` Jan Kiszka
0 siblings, 0 replies; 16+ messages in thread
From: Jan Kiszka @ 2019-06-30 10:18 UTC (permalink / raw)
To: Marc Zyngier; +Cc: kvmarm, kvm, Christoffer Dall
On 30.06.19 11:34, Jan Kiszka wrote:
> On 30.06.19 00:42, Marc Zyngier wrote:
>> On Sat, 29 Jun 2019 19:09:37 +0200
>> Jan Kiszka <jan.kiszka@web.de> wrote:
>>> However, as the Raspberry kernel is not yet ready for 64-bit (and
>>> upstream is not in sight), I had to use legacy 32-bit mode. And there we
>>> stumble over the core detection. This little patch made it work, though:
>>>
>>> diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
>>> index 2b8de885b2bf..01606aad73cc 100644
>>> --- a/arch/arm/kvm/guest.c
>>> +++ b/arch/arm/kvm/guest.c
>>> @@ -290,6 +290,7 @@ int __attribute_const__ kvm_target_cpu(void)
>>> case ARM_CPU_PART_CORTEX_A7:
>>> return KVM_ARM_TARGET_CORTEX_A7;
>>> case ARM_CPU_PART_CORTEX_A15:
>>> + case ARM_CPU_PART_CORTEX_A72:
>>> return KVM_ARM_TARGET_CORTEX_A15;
>>> default:
>>> return -EINVAL;
>>>
>>> That raises the question if this is hack or a valid change and if there
>>> is general interest in mapping 64-bit cores on 32-bit if they happen to
>>> run in 32-bit mode.
>>
>> The real thing to do here would be to move to a generic target, much
>> like we did on the 64bit side. Could you investigate that instead? It
>> would also allow KVM to be used on other 32bit cores such as
>> A12/A17/A32.
>
> You mean something like KVM_ARM_TARGET_GENERIC_V8? Need to study that...
>
Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
found nothing so far:
kvm_reset_vcpu:
switch (vcpu->arch.target) {
case KVM_ARM_TARGET_CORTEX_A7:
case KVM_ARM_TARGET_CORTEX_A15:
reset_regs = &cortexa_regs_reset;
vcpu->arch.midr = read_cpuid_id();
break;
And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
symbols renamed.
What's the purpose of all that? Planned for something bigger but never
implemented? From that perspective, there seems to be no need to arch.target and
kvm_coproc_target_table at all.
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: KVM works on RPi4
2019-06-30 10:18 ` Jan Kiszka
@ 2019-06-30 10:49 ` Jan Kiszka
-1 siblings, 0 replies; 16+ messages in thread
From: Jan Kiszka @ 2019-06-30 10:49 UTC (permalink / raw)
To: Marc Zyngier; +Cc: kvmarm, kvm
On 30.06.19 12:18, Jan Kiszka wrote:
> On 30.06.19 11:34, Jan Kiszka wrote:
>> On 30.06.19 00:42, Marc Zyngier wrote:
>>> On Sat, 29 Jun 2019 19:09:37 +0200
>>> Jan Kiszka <jan.kiszka@web.de> wrote:
>>>> However, as the Raspberry kernel is not yet ready for 64-bit (and
>>>> upstream is not in sight), I had to use legacy 32-bit mode. And there we
>>>> stumble over the core detection. This little patch made it work, though:
>>>>
>>>> diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
>>>> index 2b8de885b2bf..01606aad73cc 100644
>>>> --- a/arch/arm/kvm/guest.c
>>>> +++ b/arch/arm/kvm/guest.c
>>>> @@ -290,6 +290,7 @@ int __attribute_const__ kvm_target_cpu(void)
>>>> case ARM_CPU_PART_CORTEX_A7:
>>>> return KVM_ARM_TARGET_CORTEX_A7;
>>>> case ARM_CPU_PART_CORTEX_A15:
>>>> + case ARM_CPU_PART_CORTEX_A72:
>>>> return KVM_ARM_TARGET_CORTEX_A15;
>>>> default:
>>>> return -EINVAL;
>>>>
>>>> That raises the question if this is hack or a valid change and if there
>>>> is general interest in mapping 64-bit cores on 32-bit if they happen to
>>>> run in 32-bit mode.
>>>
>>> The real thing to do here would be to move to a generic target, much
>>> like we did on the 64bit side. Could you investigate that instead? It
>>> would also allow KVM to be used on other 32bit cores such as
>>> A12/A17/A32.
>>
>> You mean something like KVM_ARM_TARGET_GENERIC_V8? Need to study that...
>>
>
> Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
> found nothing so far:
>
> kvm_reset_vcpu:
> switch (vcpu->arch.target) {
> case KVM_ARM_TARGET_CORTEX_A7:
> case KVM_ARM_TARGET_CORTEX_A15:
> reset_regs = &cortexa_regs_reset;
> vcpu->arch.midr = read_cpuid_id();
> break;
>
> And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
> symbols renamed.
OK, found it: The reset values of SCTLR differ, in one bit. A15 starts with
branch prediction (11) off, A7 with that feature enabled. Quite some boilerplate
code for managing a single bit.
For a generic target, can we simply assume A15 reset behaviour?
Jan
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kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: KVM works on RPi4
@ 2019-06-30 10:49 ` Jan Kiszka
0 siblings, 0 replies; 16+ messages in thread
From: Jan Kiszka @ 2019-06-30 10:49 UTC (permalink / raw)
To: Marc Zyngier; +Cc: kvmarm, kvm, Christoffer Dall
On 30.06.19 12:18, Jan Kiszka wrote:
> On 30.06.19 11:34, Jan Kiszka wrote:
>> On 30.06.19 00:42, Marc Zyngier wrote:
>>> On Sat, 29 Jun 2019 19:09:37 +0200
>>> Jan Kiszka <jan.kiszka@web.de> wrote:
>>>> However, as the Raspberry kernel is not yet ready for 64-bit (and
>>>> upstream is not in sight), I had to use legacy 32-bit mode. And there we
>>>> stumble over the core detection. This little patch made it work, though:
>>>>
>>>> diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
>>>> index 2b8de885b2bf..01606aad73cc 100644
>>>> --- a/arch/arm/kvm/guest.c
>>>> +++ b/arch/arm/kvm/guest.c
>>>> @@ -290,6 +290,7 @@ int __attribute_const__ kvm_target_cpu(void)
>>>> case ARM_CPU_PART_CORTEX_A7:
>>>> return KVM_ARM_TARGET_CORTEX_A7;
>>>> case ARM_CPU_PART_CORTEX_A15:
>>>> + case ARM_CPU_PART_CORTEX_A72:
>>>> return KVM_ARM_TARGET_CORTEX_A15;
>>>> default:
>>>> return -EINVAL;
>>>>
>>>> That raises the question if this is hack or a valid change and if there
>>>> is general interest in mapping 64-bit cores on 32-bit if they happen to
>>>> run in 32-bit mode.
>>>
>>> The real thing to do here would be to move to a generic target, much
>>> like we did on the 64bit side. Could you investigate that instead? It
>>> would also allow KVM to be used on other 32bit cores such as
>>> A12/A17/A32.
>>
>> You mean something like KVM_ARM_TARGET_GENERIC_V8? Need to study that...
>>
>
> Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
> found nothing so far:
>
> kvm_reset_vcpu:
> switch (vcpu->arch.target) {
> case KVM_ARM_TARGET_CORTEX_A7:
> case KVM_ARM_TARGET_CORTEX_A15:
> reset_regs = &cortexa_regs_reset;
> vcpu->arch.midr = read_cpuid_id();
> break;
>
> And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
> symbols renamed.
OK, found it: The reset values of SCTLR differ, in one bit. A15 starts with
branch prediction (11) off, A7 with that feature enabled. Quite some boilerplate
code for managing a single bit.
For a generic target, can we simply assume A15 reset behaviour?
Jan
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: KVM works on RPi4
2019-06-30 10:49 ` Jan Kiszka
@ 2019-07-01 8:18 ` Vladimir Murzin
-1 siblings, 0 replies; 16+ messages in thread
From: Vladimir Murzin @ 2019-07-01 8:18 UTC (permalink / raw)
To: Jan Kiszka, Marc Zyngier; +Cc: kvmarm, kvm
On 6/30/19 11:49 AM, Jan Kiszka wrote:
> On 30.06.19 12:18, Jan Kiszka wrote:
>> On 30.06.19 11:34, Jan Kiszka wrote:
>>> On 30.06.19 00:42, Marc Zyngier wrote:
>>>> On Sat, 29 Jun 2019 19:09:37 +0200
>>>> Jan Kiszka <jan.kiszka@web.de> wrote:
>>>>> However, as the Raspberry kernel is not yet ready for 64-bit (and
>>>>> upstream is not in sight), I had to use legacy 32-bit mode. And there we
>>>>> stumble over the core detection. This little patch made it work, though:
>>>>>
>>>>> diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
>>>>> index 2b8de885b2bf..01606aad73cc 100644
>>>>> --- a/arch/arm/kvm/guest.c
>>>>> +++ b/arch/arm/kvm/guest.c
>>>>> @@ -290,6 +290,7 @@ int __attribute_const__ kvm_target_cpu(void)
>>>>> case ARM_CPU_PART_CORTEX_A7:
>>>>> return KVM_ARM_TARGET_CORTEX_A7;
>>>>> case ARM_CPU_PART_CORTEX_A15:
>>>>> + case ARM_CPU_PART_CORTEX_A72:
>>>>> return KVM_ARM_TARGET_CORTEX_A15;
>>>>> default:
>>>>> return -EINVAL;
>>>>>
>>>>> That raises the question if this is hack or a valid change and if there
>>>>> is general interest in mapping 64-bit cores on 32-bit if they happen to
>>>>> run in 32-bit mode.
>>>>
>>>> The real thing to do here would be to move to a generic target, much
>>>> like we did on the 64bit side. Could you investigate that instead? It
>>>> would also allow KVM to be used on other 32bit cores such as
>>>> A12/A17/A32.
>>>
>>> You mean something like KVM_ARM_TARGET_GENERIC_V8? Need to study that...
>>>
>>
>> Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
>> found nothing so far:
>>
>> kvm_reset_vcpu:
>> switch (vcpu->arch.target) {
>> case KVM_ARM_TARGET_CORTEX_A7:
>> case KVM_ARM_TARGET_CORTEX_A15:
>> reset_regs = &cortexa_regs_reset;
>> vcpu->arch.midr = read_cpuid_id();
>> break;
>>
>> And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
>> symbols renamed.
>
> OK, found it: The reset values of SCTLR differ, in one bit. A15 starts with
> branch prediction (11) off, A7 with that feature enabled. Quite some boilerplate
> code for managing a single bit.
>
> For a generic target, can we simply assume A15 reset behaviour?
IIUC, it'd work only for ARCH_VIRT guest, which is known not to touch IMP_DEF
registers. Unfortunately, other variants of guests (ARCH_VEXPRESS?) might touch
such registers, for instance, l2ctlr is often used for querying number of populated
cpus, and it might not be present at all on v8. Also, content of IMP_DEF register
is not fixed and meaning of the bits may wary between different implementations, so
guests may react differently.
Just my 2p.
Cheers
Vladimir
>
> Jan
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: KVM works on RPi4
@ 2019-07-01 8:18 ` Vladimir Murzin
0 siblings, 0 replies; 16+ messages in thread
From: Vladimir Murzin @ 2019-07-01 8:18 UTC (permalink / raw)
To: Jan Kiszka, Marc Zyngier; +Cc: kvmarm, kvm
On 6/30/19 11:49 AM, Jan Kiszka wrote:
> On 30.06.19 12:18, Jan Kiszka wrote:
>> On 30.06.19 11:34, Jan Kiszka wrote:
>>> On 30.06.19 00:42, Marc Zyngier wrote:
>>>> On Sat, 29 Jun 2019 19:09:37 +0200
>>>> Jan Kiszka <jan.kiszka@web.de> wrote:
>>>>> However, as the Raspberry kernel is not yet ready for 64-bit (and
>>>>> upstream is not in sight), I had to use legacy 32-bit mode. And there we
>>>>> stumble over the core detection. This little patch made it work, though:
>>>>>
>>>>> diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
>>>>> index 2b8de885b2bf..01606aad73cc 100644
>>>>> --- a/arch/arm/kvm/guest.c
>>>>> +++ b/arch/arm/kvm/guest.c
>>>>> @@ -290,6 +290,7 @@ int __attribute_const__ kvm_target_cpu(void)
>>>>> case ARM_CPU_PART_CORTEX_A7:
>>>>> return KVM_ARM_TARGET_CORTEX_A7;
>>>>> case ARM_CPU_PART_CORTEX_A15:
>>>>> + case ARM_CPU_PART_CORTEX_A72:
>>>>> return KVM_ARM_TARGET_CORTEX_A15;
>>>>> default:
>>>>> return -EINVAL;
>>>>>
>>>>> That raises the question if this is hack or a valid change and if there
>>>>> is general interest in mapping 64-bit cores on 32-bit if they happen to
>>>>> run in 32-bit mode.
>>>>
>>>> The real thing to do here would be to move to a generic target, much
>>>> like we did on the 64bit side. Could you investigate that instead? It
>>>> would also allow KVM to be used on other 32bit cores such as
>>>> A12/A17/A32.
>>>
>>> You mean something like KVM_ARM_TARGET_GENERIC_V8? Need to study that...
>>>
>>
>> Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
>> found nothing so far:
>>
>> kvm_reset_vcpu:
>> switch (vcpu->arch.target) {
>> case KVM_ARM_TARGET_CORTEX_A7:
>> case KVM_ARM_TARGET_CORTEX_A15:
>> reset_regs = &cortexa_regs_reset;
>> vcpu->arch.midr = read_cpuid_id();
>> break;
>>
>> And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
>> symbols renamed.
>
> OK, found it: The reset values of SCTLR differ, in one bit. A15 starts with
> branch prediction (11) off, A7 with that feature enabled. Quite some boilerplate
> code for managing a single bit.
>
> For a generic target, can we simply assume A15 reset behaviour?
IIUC, it'd work only for ARCH_VIRT guest, which is known not to touch IMP_DEF
registers. Unfortunately, other variants of guests (ARCH_VEXPRESS?) might touch
such registers, for instance, l2ctlr is often used for querying number of populated
cpus, and it might not be present at all on v8. Also, content of IMP_DEF register
is not fixed and meaning of the bits may wary between different implementations, so
guests may react differently.
Just my 2p.
Cheers
Vladimir
>
> Jan
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: KVM works on RPi4
2019-06-30 10:18 ` Jan Kiszka
@ 2019-08-26 8:38 ` Christoffer Dall
-1 siblings, 0 replies; 16+ messages in thread
From: Christoffer Dall @ 2019-08-26 8:38 UTC (permalink / raw)
To: Jan Kiszka; +Cc: Marc Zyngier, kvmarm, kvm
Hi Jan,
On Sun, Jun 30, 2019 at 12:18:59PM +0200, Jan Kiszka wrote:
> On 30.06.19 11:34, Jan Kiszka wrote:
> >On 30.06.19 00:42, Marc Zyngier wrote:
> >>On Sat, 29 Jun 2019 19:09:37 +0200
> >>Jan Kiszka <jan.kiszka@web.de> wrote:
> >>>However, as the Raspberry kernel is not yet ready for 64-bit (and
> >>>upstream is not in sight), I had to use legacy 32-bit mode. And there we
> >>>stumble over the core detection. This little patch made it work, though:
> >>>
> >>>diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
> >>>index 2b8de885b2bf..01606aad73cc 100644
> >>>--- a/arch/arm/kvm/guest.c
> >>>+++ b/arch/arm/kvm/guest.c
> >>>@@ -290,6 +290,7 @@ int __attribute_const__ kvm_target_cpu(void)
> >>> case ARM_CPU_PART_CORTEX_A7:
> >>> return KVM_ARM_TARGET_CORTEX_A7;
> >>> case ARM_CPU_PART_CORTEX_A15:
> >>>+ case ARM_CPU_PART_CORTEX_A72:
> >>> return KVM_ARM_TARGET_CORTEX_A15;
> >>> default:
> >>> return -EINVAL;
> >>>
> >>>That raises the question if this is hack or a valid change and if there
> >>>is general interest in mapping 64-bit cores on 32-bit if they happen to
> >>>run in 32-bit mode.
> >>
> >>The real thing to do here would be to move to a generic target, much
> >>like we did on the 64bit side. Could you investigate that instead? It
> >>would also allow KVM to be used on other 32bit cores such as
> >>A12/A17/A32.
> >
> >You mean something like KVM_ARM_TARGET_GENERIC_V8? Need to study that...
> >
>
> Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
> found nothing so far:
>
> kvm_reset_vcpu:
> switch (vcpu->arch.target) {
> case KVM_ARM_TARGET_CORTEX_A7:
> case KVM_ARM_TARGET_CORTEX_A15:
> reset_regs = &cortexa_regs_reset;
> vcpu->arch.midr = read_cpuid_id();
> break;
>
> And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
> symbols renamed.
>
> What's the purpose of all that? Planned for something bigger but never
> implemented? From that perspective, there seems to be no need to arch.target and
> kvm_coproc_target_table at all.
>
There was some speculation involved here, and we needed to figure out
how we would deal with implementation defined behavior, so we built this
support for each type of CPU etc.
In reality, most CPUs that we support are pretty similar and that's why
we did the generic CPU type instead. In practice, there might be a more
light-weight appraoch to handling the minor differences between CPU
implementations than what we have here.
Thanks,
Christoffer
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: KVM works on RPi4
@ 2019-08-26 8:38 ` Christoffer Dall
0 siblings, 0 replies; 16+ messages in thread
From: Christoffer Dall @ 2019-08-26 8:38 UTC (permalink / raw)
To: Jan Kiszka; +Cc: Marc Zyngier, kvmarm, kvm
Hi Jan,
On Sun, Jun 30, 2019 at 12:18:59PM +0200, Jan Kiszka wrote:
> On 30.06.19 11:34, Jan Kiszka wrote:
> >On 30.06.19 00:42, Marc Zyngier wrote:
> >>On Sat, 29 Jun 2019 19:09:37 +0200
> >>Jan Kiszka <jan.kiszka@web.de> wrote:
> >>>However, as the Raspberry kernel is not yet ready for 64-bit (and
> >>>upstream is not in sight), I had to use legacy 32-bit mode. And there we
> >>>stumble over the core detection. This little patch made it work, though:
> >>>
> >>>diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
> >>>index 2b8de885b2bf..01606aad73cc 100644
> >>>--- a/arch/arm/kvm/guest.c
> >>>+++ b/arch/arm/kvm/guest.c
> >>>@@ -290,6 +290,7 @@ int __attribute_const__ kvm_target_cpu(void)
> >>> case ARM_CPU_PART_CORTEX_A7:
> >>> return KVM_ARM_TARGET_CORTEX_A7;
> >>> case ARM_CPU_PART_CORTEX_A15:
> >>>+ case ARM_CPU_PART_CORTEX_A72:
> >>> return KVM_ARM_TARGET_CORTEX_A15;
> >>> default:
> >>> return -EINVAL;
> >>>
> >>>That raises the question if this is hack or a valid change and if there
> >>>is general interest in mapping 64-bit cores on 32-bit if they happen to
> >>>run in 32-bit mode.
> >>
> >>The real thing to do here would be to move to a generic target, much
> >>like we did on the 64bit side. Could you investigate that instead? It
> >>would also allow KVM to be used on other 32bit cores such as
> >>A12/A17/A32.
> >
> >You mean something like KVM_ARM_TARGET_GENERIC_V8? Need to study that...
> >
>
> Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
> found nothing so far:
>
> kvm_reset_vcpu:
> switch (vcpu->arch.target) {
> case KVM_ARM_TARGET_CORTEX_A7:
> case KVM_ARM_TARGET_CORTEX_A15:
> reset_regs = &cortexa_regs_reset;
> vcpu->arch.midr = read_cpuid_id();
> break;
>
> And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
> symbols renamed.
>
> What's the purpose of all that? Planned for something bigger but never
> implemented? From that perspective, there seems to be no need to arch.target and
> kvm_coproc_target_table at all.
>
There was some speculation involved here, and we needed to figure out
how we would deal with implementation defined behavior, so we built this
support for each type of CPU etc.
In reality, most CPUs that we support are pretty similar and that's why
we did the generic CPU type instead. In practice, there might be a more
light-weight appraoch to handling the minor differences between CPU
implementations than what we have here.
Thanks,
Christoffer
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: KVM works on RPi4
2019-08-26 8:38 ` Christoffer Dall
@ 2019-08-26 12:00 ` Peter Maydell
-1 siblings, 0 replies; 16+ messages in thread
From: Peter Maydell @ 2019-08-26 12:00 UTC (permalink / raw)
To: Christoffer Dall; +Cc: Marc Zyngier, Jan Kiszka, kvmarm, kvm
On Mon, 26 Aug 2019 at 09:38, Christoffer Dall <christoffer.dall@arm.com> wrote:
> On Sun, Jun 30, 2019 at 12:18:59PM +0200, Jan Kiszka wrote:
> > Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
> > found nothing so far:
> >
> > kvm_reset_vcpu:
> > switch (vcpu->arch.target) {
> > case KVM_ARM_TARGET_CORTEX_A7:
> > case KVM_ARM_TARGET_CORTEX_A15:
> > reset_regs = &cortexa_regs_reset;
> > vcpu->arch.midr = read_cpuid_id();
> > break;
> >
> > And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
> > symbols renamed.
> >
> > What's the purpose of all that? Planned for something bigger but never
> > implemented? From that perspective, there seems to be no need to arch.target and
> > kvm_coproc_target_table at all.
> >
>
> There was some speculation involved here, and we needed to figure out
> how we would deal with implementation defined behavior, so we built this
> support for each type of CPU etc.
>
> In reality, most CPUs that we support are pretty similar and that's why
> we did the generic CPU type instead. In practice, there might be a more
> light-weight appraoch to handling the minor differences between CPU
> implementations than what we have here.
The other future-direction I think we were thinking about was that
one day we'd want to support showing the guest a CPU other than
what the host is, at which point you would want to be able to
say specifically "give me a Cortex-A7" and have it work even if the
host was a Cortex-A15. But there are significant unresolved design
issues if we ever did want to go in that direction...
thanks
-- PMM
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: KVM works on RPi4
@ 2019-08-26 12:00 ` Peter Maydell
0 siblings, 0 replies; 16+ messages in thread
From: Peter Maydell @ 2019-08-26 12:00 UTC (permalink / raw)
To: Christoffer Dall; +Cc: Jan Kiszka, Marc Zyngier, kvmarm, kvm
On Mon, 26 Aug 2019 at 09:38, Christoffer Dall <christoffer.dall@arm.com> wrote:
> On Sun, Jun 30, 2019 at 12:18:59PM +0200, Jan Kiszka wrote:
> > Hmm, looking at what KVM_ARM_TARGET_CORTEX_A7 and ..._A15 differentiates, I
> > found nothing so far:
> >
> > kvm_reset_vcpu:
> > switch (vcpu->arch.target) {
> > case KVM_ARM_TARGET_CORTEX_A7:
> > case KVM_ARM_TARGET_CORTEX_A15:
> > reset_regs = &cortexa_regs_reset;
> > vcpu->arch.midr = read_cpuid_id();
> > break;
> >
> > And arch/arm/kvm/coproc_a15.c looks like a copy of coproc_a7.c, just with some
> > symbols renamed.
> >
> > What's the purpose of all that? Planned for something bigger but never
> > implemented? From that perspective, there seems to be no need to arch.target and
> > kvm_coproc_target_table at all.
> >
>
> There was some speculation involved here, and we needed to figure out
> how we would deal with implementation defined behavior, so we built this
> support for each type of CPU etc.
>
> In reality, most CPUs that we support are pretty similar and that's why
> we did the generic CPU type instead. In practice, there might be a more
> light-weight appraoch to handling the minor differences between CPU
> implementations than what we have here.
The other future-direction I think we were thinking about was that
one day we'd want to support showing the guest a CPU other than
what the host is, at which point you would want to be able to
say specifically "give me a Cortex-A7" and have it work even if the
host was a Cortex-A15. But there are significant unresolved design
issues if we ever did want to go in that direction...
thanks
-- PMM
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