[PATCH] regmap-irq: do not write mask register if mask_base is zero

[PATCH] regmap-irq: do not write mask register if mask_base is zero

[Linus Walleij]

From: Mark Zhang <markz@nvidia.com>

commit 7151449fe7fa5962c6153355f9779d6be99e8e97 upstream.

If client have not provided the mask base register then do not
write into the mask register.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
This commit was found in an nVidia product tree based on
v4.19, and looks like definitive stable material to me.
It should go into v4.19 only as far as I can tell.
---
 drivers/base/regmap/regmap-irq.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 429ca8ed7e51..982c7ac311b8 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -91,6 +91,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 	 * suppress pointless writes.
 	 */
 	for (i = 0; i < d->chip->num_regs; i++) {
+		if (!d->chip->mask_base)
+			continue;
+
 		reg = d->chip->mask_base +
 			(i * map->reg_stride * d->irq_reg_stride);
 		if (d->chip->mask_invert) {
@@ -526,6 +529,9 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 	/* Mask all the interrupts by default */
 	for (i = 0; i < chip->num_regs; i++) {
 		d->mask_buf[i] = d->mask_buf_def[i];
+		if (!chip->mask_base)
+			continue;
+
 		reg = chip->mask_base +
 			(i * map->reg_stride * d->irq_reg_stride);
 		if (chip->mask_invert)
-- 
2.20.1

Re: [PATCH] regmap-irq: do not write mask register if mask_base is zero

[Linus Walleij]

Hi Greg,

On Mon, May 20, 2019 at 7:23 PM Linus Walleij <linus.walleij@linaro.org> wrote:

> From: Mark Zhang <markz@nvidia.com>
>
> commit 7151449fe7fa5962c6153355f9779d6be99e8e97 upstream.
>
> If client have not provided the mask base register then do not
> write into the mask register.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
> Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> Signed-off-by: Mark Zhang <markz@nvidia.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> This commit was found in an nVidia product tree based on
> v4.19, and looks like definitive stable material to me.
> It should go into v4.19 only as far as I can tell.

Was this missed or is there some reason for why this didn't get
queued to stable?

Yours,
Linus Walleij

Re: [PATCH] regmap-irq: do not write mask register if mask_base is zero

[Greg Kroah-Hartman]

On Wed, Jul 17, 2019 at 09:42:00AM +0200, Linus Walleij wrote:
> Hi Greg,
> 
> On Mon, May 20, 2019 at 7:23 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> 
> > From: Mark Zhang <markz@nvidia.com>
> >
> > commit 7151449fe7fa5962c6153355f9779d6be99e8e97 upstream.
> >
> > If client have not provided the mask base register then do not
> > write into the mask register.
> >
> > Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> > Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
> > Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> > Signed-off-by: Mark Zhang <markz@nvidia.com>
> > Signed-off-by: Mark Brown <broonie@kernel.org>
> > ---
> > This commit was found in an nVidia product tree based on
> > v4.19, and looks like definitive stable material to me.
> > It should go into v4.19 only as far as I can tell.
> 
> Was this missed or is there some reason for why this didn't get
> queued to stable?

I think it was missed, sorry :(

Now queued up.

greg k-h

Re: [PATCH] regmap-irq: do not write mask register if mask_base is zero

[Greg Kroah-Hartman]

On Wed, Jul 17, 2019 at 04:54:17PM +0900, Greg Kroah-Hartman wrote:
> On Wed, Jul 17, 2019 at 09:42:00AM +0200, Linus Walleij wrote:
> > Hi Greg,
> > 
> > On Mon, May 20, 2019 at 7:23 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> > 
> > > From: Mark Zhang <markz@nvidia.com>
> > >
> > > commit 7151449fe7fa5962c6153355f9779d6be99e8e97 upstream.
> > >
> > > If client have not provided the mask base register then do not
> > > write into the mask register.
> > >
> > > Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> > > Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
> > > Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> > > Signed-off-by: Mark Zhang <markz@nvidia.com>
> > > Signed-off-by: Mark Brown <broonie@kernel.org>
> > > ---
> > > This commit was found in an nVidia product tree based on
> > > v4.19, and looks like definitive stable material to me.
> > > It should go into v4.19 only as far as I can tell.
> > 
> > Was this missed or is there some reason for why this didn't get
> > queued to stable?
> 
> I think it was missed, sorry :(

Found it, it was burried in my "to-queue" stable mbox, thanks for
resending.

greg k-h

[PATCH] regmap-irq: do not write mask register if mask_base is zero

[Mark Zhang]

If client have not provided the mask base register then do not
write into the mask register.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Signed-off-by: Mark Zhang <markz@nvidia.com>
---
 drivers/base/regmap/regmap-irq.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index d2d0014b0d23..330c1f7e9665 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -108,6 +108,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 	 * suppress pointless writes.
 	 */
 	for (i = 0; i < d->chip->num_regs; i++) {
+		if (!d->chip->mask_base)
+			continue;
+
 		reg = d->chip->mask_base +
 			(i * map->reg_stride * d->irq_reg_stride);
 		if (d->chip->mask_invert) {
@@ -588,6 +591,9 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 	/* Mask all the interrupts by default */
 	for (i = 0; i < chip->num_regs; i++) {
 		d->mask_buf[i] = d->mask_buf_def[i];
+		if (!chip->mask_base)
+			continue;
+
 		reg = chip->mask_base +
 			(i * map->reg_stride * d->irq_reg_stride);
 		if (chip->mask_invert)
-- 
2.19.2

[PATCH] regmap-irq: do not write mask register if mask_base is zero

[Mark Zhang]

If client have not provided the mask base register then do not
write into the mask register.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Signed-off-by: Mark Zhang <markz@nvidia.com>
---
 drivers/base/regmap/regmap-irq.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index d2d0014b0d23..330c1f7e9665 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -108,6 +108,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 	 * suppress pointless writes.
 	 */
 	for (i = 0; i < d->chip->num_regs; i++) {
+		if (!d->chip->mask_base)
+			continue;
+
 		reg = d->chip->mask_base +
 			(i * map->reg_stride * d->irq_reg_stride);
 		if (d->chip->mask_invert) {
@@ -588,6 +591,9 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 	/* Mask all the interrupts by default */
 	for (i = 0; i < chip->num_regs; i++) {
 		d->mask_buf[i] = d->mask_buf_def[i];
+		if (!chip->mask_base)
+			continue;
+
 		reg = chip->mask_base +
 			(i * map->reg_stride * d->irq_reg_stride);
 		if (chip->mask_invert)
-- 
2.19.2

Re: [PATCH] regmap-irq: do not write mask register if mask_base is zero

[Mark Zhang]

Some background infos:
This patch fixes an issue when using max77620 gpio driver.
The issue is that, max77620 doesn't have a dedicated GPIO interrupt mask register.
If you want to mask a separate GPIO interrupt on max77620, you need to do that in
it's type register(starting from register address 0x36 - 0x3D).
So this means we can't find a proper register for "mask_base" property, while in current
regmap-irq.c, it updates mask registers assuming "mask_base" is always provided.

Maybe this patch is not the cleanest way to fix the issue, e.g: some chip's mask register
address is zero, in that case, could you help to suggest what is the right way?

Thanks,
Mark

On 1/14/2019 5:32 PM, Mark Zhang wrote:
> If client have not provided the mask base register then do not
> write into the mask register.
> 
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
> Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> Signed-off-by: Mark Zhang <markz@nvidia.com>
> ---
>  drivers/base/regmap/regmap-irq.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
> index d2d0014b0d23..330c1f7e9665 100644
> --- a/drivers/base/regmap/regmap-irq.c
> +++ b/drivers/base/regmap/regmap-irq.c
> @@ -108,6 +108,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
>  	 * suppress pointless writes.
>  	 */
>  	for (i = 0; i < d->chip->num_regs; i++) {
> +		if (!d->chip->mask_base)
> +			continue;
> +
>  		reg = d->chip->mask_base +
>  			(i * map->reg_stride * d->irq_reg_stride);
>  		if (d->chip->mask_invert) {
> @@ -588,6 +591,9 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
>  	/* Mask all the interrupts by default */
>  	for (i = 0; i < chip->num_regs; i++) {
>  		d->mask_buf[i] = d->mask_buf_def[i];
> +		if (!chip->mask_base)
> +			continue;
> +
>  		reg = chip->mask_base +
>  			(i * map->reg_stride * d->irq_reg_stride);
>  		if (chip->mask_invert)
> 

Re: [PATCH] regmap-irq: do not write mask register if mask_base is zero

[Mark Zhang]

Some background infos:
This patch fixes an issue when using max77620 gpio driver.
The issue is that, max77620 doesn't have a dedicated GPIO interrupt mask register.
If you want to mask a separate GPIO interrupt on max77620, you need to do that in
it's type register(starting from register address 0x36 - 0x3D).
So this means we can't find a proper register for "mask_base" property, while in current
regmap-irq.c, it updates mask registers assuming "mask_base" is always provided.

Maybe this patch is not the cleanest way to fix the issue, e.g: some chip's mask register
address is zero, in that case, could you help to suggest what is the right way?

Thanks,
Mark

On 1/14/2019 5:32 PM, Mark Zhang wrote:
> If client have not provided the mask base register then do not
> write into the mask register.
> 
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
> Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
> Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
> Signed-off-by: Mark Zhang <markz@nvidia.com>
> ---
>  drivers/base/regmap/regmap-irq.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
> index d2d0014b0d23..330c1f7e9665 100644
> --- a/drivers/base/regmap/regmap-irq.c
> +++ b/drivers/base/regmap/regmap-irq.c
> @@ -108,6 +108,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
>  	 * suppress pointless writes.
>  	 */
>  	for (i = 0; i < d->chip->num_regs; i++) {
> +		if (!d->chip->mask_base)
> +			continue;
> +
>  		reg = d->chip->mask_base +
>  			(i * map->reg_stride * d->irq_reg_stride);
>  		if (d->chip->mask_invert) {
> @@ -588,6 +591,9 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
>  	/* Mask all the interrupts by default */
>  	for (i = 0; i < chip->num_regs; i++) {
>  		d->mask_buf[i] = d->mask_buf_def[i];
> +		if (!chip->mask_base)
> +			continue;
> +
>  		reg = chip->mask_base +
>  			(i * map->reg_stride * d->irq_reg_stride);
>  		if (chip->mask_invert)
>