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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 22/22] drm/i915/mst: Do not hardcoded the crtcs that encoder can connect
Date: Thu, 18 Jul 2019 16:10:13 +0300	[thread overview]
Message-ID: <20190718131013.GA5942@intel.com> (raw)
In-Reply-To: <20190713010940.17711-23-lucas.demarchi@intel.com>

On Fri, Jul 12, 2019 at 06:09:40PM -0700, Lucas De Marchi wrote:
> From: José Roberto de Souza <jose.souza@intel.com>
> 
> Tiger Lake has up to 4 pipes so the mask would need to be 0xf instead of
> 0x7. Do not hardcode the mask so it allows the fake MST encoders to
> connect to all pipes no matter how many the platform has.
> 
> Iterating over all pipes to keep consistent with intel_ddi_init().
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 60652ebbdf61..1b79b6befa92 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -586,6 +586,8 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum
>  	struct intel_dp_mst_encoder *intel_mst;
>  	struct intel_encoder *intel_encoder;
>  	struct drm_device *dev = intel_dig_port->base.base.dev;
> +	struct drm_i915_private *dev_priv = to_i915(dev);
> +	enum pipe pipe_iter;
>  
>  	intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
>  
> @@ -602,8 +604,9 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum
>  	intel_encoder->type = INTEL_OUTPUT_DP_MST;
>  	intel_encoder->power_domain = intel_dig_port->base.power_domain;
>  	intel_encoder->port = intel_dig_port->base.port;
> -	intel_encoder->crtc_mask = 0x7;
>  	intel_encoder->cloneable = 0;
> +	for_each_pipe(dev_priv, pipe_iter)
> +		intel_encoder->crtc_mask |= BIT(pipe_iter);

https://patchwork.freedesktop.org/patch/316555/?series=63399&rev=1

>  
>  	intel_encoder->compute_config = intel_dp_mst_compute_config;
>  	intel_encoder->disable = intel_mst_disable_dp;
> -- 
> 2.21.0

-- 
Ville Syrjälä
Intel
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-07-18 13:10 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-13  1:09 [PATCH 00/22] Tiger Lake part 2 Lucas De Marchi
2019-07-13  1:09 ` [PATCH 01/22] drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization Lucas De Marchi
2019-07-18 20:35   ` Atwood, Matthew S
2019-07-13  1:09 ` [PATCH 02/22] drm/i915/tgl: select correct bit for port select Lucas De Marchi
2019-07-16 21:37   ` Srivatsa, Anusha
2019-07-18 20:20   ` Atwood, Matthew S
2019-07-13  1:09 ` [PATCH 03/22] drm/i915/tgl: update ddi/tc clock_off bits Lucas De Marchi
2019-07-16 22:41   ` Srivatsa, Anusha
2019-07-18 21:09   ` Atwood, Matthew S
2019-07-13  1:09 ` [PATCH 04/22] drm/i915/tgl: Add hpd interrupt handling Lucas De Marchi
2019-07-19 13:47   ` Ville Syrjälä
2019-07-19 16:45     ` Lucas De Marchi
2019-07-19 17:08       ` Ville Syrjälä
2019-07-19 17:14         ` Ville Syrjälä
2019-07-19 17:28           ` Lucas De Marchi
2019-07-13  1:09 ` [PATCH 05/22] drm/i915/tgl: Update north display hotplug detection to TGL connections Lucas De Marchi
2019-07-16 23:09   ` Srivatsa, Anusha
2019-07-13  1:09 ` [PATCH 06/22] drm/i915/tgl: handle DP aux interrupts Lucas De Marchi
2019-07-17  0:14   ` Srivatsa, Anusha
2019-07-13  1:09 ` [PATCH 07/22] drm/i915/dmc: Load DMC on TGL Lucas De Marchi
2019-07-19 10:44   ` Anshuman Gupta
2019-07-19 15:34     ` Lucas De Marchi
2019-07-19 16:05   ` Atwood, Matthew S
2019-07-13  1:09 ` [PATCH 08/22] drm/i915/tgl: Add DKL phy pll registers Lucas De Marchi
2019-07-19 21:22   ` Atwood, Matthew S
2019-07-13  1:09 ` [PATCH 09/22] drm/i915/tgl: re-indent code to prepare for DKL changes Lucas De Marchi
2019-07-22 22:31   ` Atwood, Matthew S
2019-07-13  1:09 ` [PATCH 10/22] drm/i915/tgl: Add DKL phy pll state calculations Lucas De Marchi
2019-07-13  1:09 ` [PATCH 11/22] drm/i915/tgl: start adding the DKL PLLs to use on TC ports Lucas De Marchi
2019-07-13  1:09 ` [PATCH 12/22] drm/i915/tgl: Add support for dkl pll write Lucas De Marchi
2019-07-13  1:09 ` [PATCH 13/22] drm/i915/gen12: add support for reading the timestamp frequency Lucas De Marchi
2019-07-13  1:09 ` [PATCH 14/22] drm/i915/tgl: allow the reg_read ioctl to read the RCS TIMESTAMP register Lucas De Marchi
2019-07-13  1:09 ` [PATCH 15/22] drm/i915/tgl: Introduce initial Tigerlake Workarounds Lucas De Marchi
2019-07-13  1:09 ` [PATCH 16/22] drm/i915/tgl: Implement Wa_1604555607 Lucas De Marchi
2019-07-18  6:03   ` Tvrtko Ursulin
2019-07-19 17:41     ` Lucas De Marchi
2019-07-13  1:09 ` [PATCH 17/22] drm/i915/tgl: Implement Wa_1406941453 Lucas De Marchi
2019-07-23 16:35   ` Summers, Stuart
2019-07-13  1:09 ` [PATCH 18/22] drm/i915/tgl: Define MOCS entries for Tigerlake Lucas De Marchi
2019-07-18 13:08   ` Ville Syrjälä
2019-07-18 17:09     ` Daniele Ceraolo Spurio
2019-07-18 17:44       ` Ville Syrjälä
2019-07-24 22:32       ` Lucas De Marchi
2019-07-25 18:26         ` Lis, Tomasz
2019-07-13  1:09 ` [PATCH 19/22] drm/i915/tgl: Tigerlake only has global MOCS registers Lucas De Marchi
2019-07-18 17:40   ` Daniele Ceraolo Spurio
2019-07-19 19:42     ` Lucas De Marchi
2019-07-13  1:09 ` [PATCH 20/22] drm/i915: Move MOCS setup to intel_mocs.c Lucas De Marchi
2019-07-23 16:30   ` Summers, Stuart
2019-07-13  1:09 ` [PATCH 21/22] drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers Lucas De Marchi
2019-07-18  5:47   ` Anshuman Gupta
2019-07-19 15:58     ` Atwood, Matthew S
2019-07-19 18:39     ` Lucas De Marchi
2019-07-22  7:41       ` Anshuman Gupta
2019-07-22 17:40         ` Lucas De Marchi
2019-07-13  1:09 ` [PATCH 22/22] drm/i915/mst: Do not hardcoded the crtcs that encoder can connect Lucas De Marchi
2019-07-18 13:10   ` Ville Syrjälä [this message]
2019-08-15 17:41     ` James Ausmus
2019-07-13  1:19 ` ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake part 2 Patchwork
2019-07-13  1:38 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-14 20:26 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-07-15 22:32 ` ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake part 2 (rev2) Patchwork
2019-07-15 22:55 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-16  0:02 ` ✗ Fi.CI.IGT: failure " Patchwork

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