From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 04/22] drm/i915/tgl: Add hpd interrupt handling
Date: Fri, 19 Jul 2019 20:14:40 +0300 [thread overview]
Message-ID: <20190719171440.GS5942@intel.com> (raw)
In-Reply-To: <20190719170847.GR5942@intel.com>
On Fri, Jul 19, 2019 at 08:08:47PM +0300, Ville Syrjälä wrote:
> On Fri, Jul 19, 2019 at 09:45:16AM -0700, Lucas De Marchi wrote:
> > On Fri, Jul 19, 2019 at 04:47:45PM +0300, Ville Syrjälä wrote:
> > >On Fri, Jul 12, 2019 at 06:09:22PM -0700, Lucas De Marchi wrote:
> > >> Add hotdplug detection for all ports on TGP. icp_hpd_detection_setup()
> > >> is refactored to be shared with TGP.
> > >>
> > >> While we increase the number of pins, add a BUILD_BUG_ON() to avoid
> > >> going over the number of bits allowed.
> > >>
> > >> Cc: Jose Souza <jose.souza@intel.com>
> > >> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > >> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > >> ---
> > >> drivers/gpu/drm/i915/display/intel_hotplug.c | 6 +
> > >> drivers/gpu/drm/i915/i915_drv.h | 4 +
> > >> drivers/gpu/drm/i915/i915_irq.c | 128 +++++++++++++++++--
> > >> drivers/gpu/drm/i915/i915_reg.h | 28 +++-
> > >> 4 files changed, 154 insertions(+), 12 deletions(-)
> > >>
> > >> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> > >> index ea3de4acc850..a7833f45dc4d 100644
> > >> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> > >> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> > >> @@ -104,6 +104,12 @@ enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
> > >> if (IS_CNL_WITH_PORT_F(dev_priv))
> > >> return HPD_PORT_E;
> > >> return HPD_PORT_F;
> > >> + case PORT_G:
> > >> + return HPD_PORT_G;
> > >> + case PORT_H:
> > >> + return HPD_PORT_H;
> > >> + case PORT_I:
> > >> + return HPD_PORT_I;
> > >> default:
> > >> MISSING_CASE(port);
> > >> return HPD_NONE;
> > >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > >> index cf7e92ca72e9..069337f11872 100644
> > >> --- a/drivers/gpu/drm/i915/i915_drv.h
> > >> +++ b/drivers/gpu/drm/i915/i915_drv.h
> > >> @@ -153,6 +153,10 @@ enum hpd_pin {
> > >> HPD_PORT_D,
> > >> HPD_PORT_E,
> > >> HPD_PORT_F,
> > >> + HPD_PORT_G,
> > >> + HPD_PORT_H,
> > >> + HPD_PORT_I,
> > >> +
> > >> HPD_NUM_PINS
> > >> };
> > >>
> > >> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > >> index 7c5ba5cbea34..a7a90674db89 100644
> > >> --- a/drivers/gpu/drm/i915/i915_irq.c
> > >> +++ b/drivers/gpu/drm/i915/i915_irq.c
> > >> @@ -148,6 +148,18 @@ static const u32 hpd_mcc[HPD_NUM_PINS] = {
> > >> [HPD_PORT_C] = SDE_TC1_HOTPLUG_ICP
> > >> };
> > >>
> > >> +static const u32 hpd_tgp[HPD_NUM_PINS] = {
> > >> + [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
> > >> + [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
> > >> + [HPD_PORT_C] = SDE_DDIC_HOTPLUG_TGP,
> > >> + [HPD_PORT_D] = SDE_TC1_HOTPLUG_ICP,
> > >> + [HPD_PORT_E] = SDE_TC2_HOTPLUG_ICP,
> > >> + [HPD_PORT_F] = SDE_TC3_HOTPLUG_ICP,
> > >> + [HPD_PORT_G] = SDE_TC4_HOTPLUG_ICP,
> > >> + [HPD_PORT_H] = SDE_TC5_HOTPLUG_TGP,
> > >> + [HPD_PORT_I] = SDE_TC6_HOTPLUG_TGP,
> > >> +};
> > >> +
> > >> static void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
> > >> i915_reg_t iir, i915_reg_t ier)
> > >> {
> > >> @@ -1706,6 +1718,40 @@ static bool icp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> > >> }
> > >> }
> > >>
> > >> +static bool tgp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> > >> +{
> > >> + switch (pin) {
> > >> + case HPD_PORT_A:
> > >> + return val & ICP_DDIA_HPD_LONG_DETECT;
> > >> + case HPD_PORT_B:
> > >> + return val & ICP_DDIB_HPD_LONG_DETECT;
> > >> + case HPD_PORT_C:
> > >> + return val & TGP_DDIC_HPD_LONG_DETECT;
> > >> + default:
> > >> + return false;
> > >> + }
> > >> +}
> > >> +
> > >> +static bool tgp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> > >> +{
> > >> + switch (pin) {
> > >> + case HPD_PORT_D:
> > >> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC1);
> > >> + case HPD_PORT_E:
> > >> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC2);
> > >> + case HPD_PORT_F:
> > >> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC3);
> > >> + case HPD_PORT_G:
> > >> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC4);
> > >> + case HPD_PORT_H:
> > >> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC5);
> > >> + case HPD_PORT_I:
> > >> + return val & ICP_TC_HPD_LONG_DETECT(PORT_TC6);
> > >> + default:
> > >> + return false;
> > >> + }
> > >> +}
> > >> +
> > >> static bool spt_port_hotplug2_long_detect(enum hpd_pin pin, u32 val)
> > >> {
> > >> switch (pin) {
> > >> @@ -1785,6 +1831,8 @@ static void intel_get_hpd_pins(struct drm_i915_private *dev_priv,
> > >> {
> > >> enum hpd_pin pin;
> > >>
> > >> + BUILD_BUG_ON(sizeof(int) * 8 < HPD_NUM_PINS);
> > >
> > >BUILD_BUG_ON(HPD_NUM_PINS > BITS_PER_TYPE(*pin_mask));
> > >would be a clearer way to express that.
> >
> > For the BITS_PER_TYPE, ok. But for the swapped order, checkpatch doesn't
> > agree:
> >
> > 8b77abf61be2 (HEAD) drm/i915/tgl: Add hpd interrupt handling
> > -:117: WARNING:CONSTANT_COMPARISON: Comparisons should place the constant on the right side of the test
> > #117: FILE: drivers/gpu/drm/i915/i915_irq.c:1852:
> > + BUILD_BUG_ON(HPD_NUM_PINS > BITS_PER_TYPE(*pin_mask));
> >
> > Note: Initially I did with the same order you suggested and had to swap
> > it while cleaning up the checkpatch warnings.
>
> Checkpatch is stupid. HPD_NUM_PINS is clearly the "variable" we're trying
> to check here, not the constant we're checking against.
Well, I guess you can argue either way. But this is the way my brain
wants to read this :)
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-07-19 17:14 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-13 1:09 [PATCH 00/22] Tiger Lake part 2 Lucas De Marchi
2019-07-13 1:09 ` [PATCH 01/22] drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization Lucas De Marchi
2019-07-18 20:35 ` Atwood, Matthew S
2019-07-13 1:09 ` [PATCH 02/22] drm/i915/tgl: select correct bit for port select Lucas De Marchi
2019-07-16 21:37 ` Srivatsa, Anusha
2019-07-18 20:20 ` Atwood, Matthew S
2019-07-13 1:09 ` [PATCH 03/22] drm/i915/tgl: update ddi/tc clock_off bits Lucas De Marchi
2019-07-16 22:41 ` Srivatsa, Anusha
2019-07-18 21:09 ` Atwood, Matthew S
2019-07-13 1:09 ` [PATCH 04/22] drm/i915/tgl: Add hpd interrupt handling Lucas De Marchi
2019-07-19 13:47 ` Ville Syrjälä
2019-07-19 16:45 ` Lucas De Marchi
2019-07-19 17:08 ` Ville Syrjälä
2019-07-19 17:14 ` Ville Syrjälä [this message]
2019-07-19 17:28 ` Lucas De Marchi
2019-07-13 1:09 ` [PATCH 05/22] drm/i915/tgl: Update north display hotplug detection to TGL connections Lucas De Marchi
2019-07-16 23:09 ` Srivatsa, Anusha
2019-07-13 1:09 ` [PATCH 06/22] drm/i915/tgl: handle DP aux interrupts Lucas De Marchi
2019-07-17 0:14 ` Srivatsa, Anusha
2019-07-13 1:09 ` [PATCH 07/22] drm/i915/dmc: Load DMC on TGL Lucas De Marchi
2019-07-19 10:44 ` Anshuman Gupta
2019-07-19 15:34 ` Lucas De Marchi
2019-07-19 16:05 ` Atwood, Matthew S
2019-07-13 1:09 ` [PATCH 08/22] drm/i915/tgl: Add DKL phy pll registers Lucas De Marchi
2019-07-19 21:22 ` Atwood, Matthew S
2019-07-13 1:09 ` [PATCH 09/22] drm/i915/tgl: re-indent code to prepare for DKL changes Lucas De Marchi
2019-07-22 22:31 ` Atwood, Matthew S
2019-07-13 1:09 ` [PATCH 10/22] drm/i915/tgl: Add DKL phy pll state calculations Lucas De Marchi
2019-07-13 1:09 ` [PATCH 11/22] drm/i915/tgl: start adding the DKL PLLs to use on TC ports Lucas De Marchi
2019-07-13 1:09 ` [PATCH 12/22] drm/i915/tgl: Add support for dkl pll write Lucas De Marchi
2019-07-13 1:09 ` [PATCH 13/22] drm/i915/gen12: add support for reading the timestamp frequency Lucas De Marchi
2019-07-13 1:09 ` [PATCH 14/22] drm/i915/tgl: allow the reg_read ioctl to read the RCS TIMESTAMP register Lucas De Marchi
2019-07-13 1:09 ` [PATCH 15/22] drm/i915/tgl: Introduce initial Tigerlake Workarounds Lucas De Marchi
2019-07-13 1:09 ` [PATCH 16/22] drm/i915/tgl: Implement Wa_1604555607 Lucas De Marchi
2019-07-18 6:03 ` Tvrtko Ursulin
2019-07-19 17:41 ` Lucas De Marchi
2019-07-13 1:09 ` [PATCH 17/22] drm/i915/tgl: Implement Wa_1406941453 Lucas De Marchi
2019-07-23 16:35 ` Summers, Stuart
2019-07-13 1:09 ` [PATCH 18/22] drm/i915/tgl: Define MOCS entries for Tigerlake Lucas De Marchi
2019-07-18 13:08 ` Ville Syrjälä
2019-07-18 17:09 ` Daniele Ceraolo Spurio
2019-07-18 17:44 ` Ville Syrjälä
2019-07-24 22:32 ` Lucas De Marchi
2019-07-25 18:26 ` Lis, Tomasz
2019-07-13 1:09 ` [PATCH 19/22] drm/i915/tgl: Tigerlake only has global MOCS registers Lucas De Marchi
2019-07-18 17:40 ` Daniele Ceraolo Spurio
2019-07-19 19:42 ` Lucas De Marchi
2019-07-13 1:09 ` [PATCH 20/22] drm/i915: Move MOCS setup to intel_mocs.c Lucas De Marchi
2019-07-23 16:30 ` Summers, Stuart
2019-07-13 1:09 ` [PATCH 21/22] drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers Lucas De Marchi
2019-07-18 5:47 ` Anshuman Gupta
2019-07-19 15:58 ` Atwood, Matthew S
2019-07-19 18:39 ` Lucas De Marchi
2019-07-22 7:41 ` Anshuman Gupta
2019-07-22 17:40 ` Lucas De Marchi
2019-07-13 1:09 ` [PATCH 22/22] drm/i915/mst: Do not hardcoded the crtcs that encoder can connect Lucas De Marchi
2019-07-18 13:10 ` Ville Syrjälä
2019-08-15 17:41 ` James Ausmus
2019-07-13 1:19 ` ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake part 2 Patchwork
2019-07-13 1:38 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-14 20:26 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-07-15 22:32 ` ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake part 2 (rev2) Patchwork
2019-07-15 22:55 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-16 0:02 ` ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190719171440.GS5942@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=lucas.demarchi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.