From: Shawn Guo <shawnguo@kernel.org>
To: Anson.Huang@nxp.com
Cc: mark.rutland@arm.com, ping.bai@nxp.com, ccaione@baylibre.com,
catalin.marinas@arm.com, agx@sigxcpu.org, angus@akkea.ca,
leonard.crestez@nxp.com, festevam@gmail.com, abel.vesa@nxp.com,
andrew.smirnov@gmail.com, will@kernel.org,
daniel.lezcano@linaro.org, linux-imx@nxp.com,
devicetree@vger.kernel.org, s.hauer@pengutronix.de,
robh+dt@kernel.org, tglx@linutronix.de, daniel.baluta@nxp.com,
linux-arm-kernel@lists.infradead.org, aisheng.dong@nxp.com,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
l.stach@pengutronix.de
Subject: Re: [PATCH V5 3/5] arm64: dts: imx8mm: Add system counter node
Date: Mon, 22 Jul 2019 11:15:18 +0800 [thread overview]
Message-ID: <20190722031517.GT3738@dragon> (raw)
In-Reply-To: <20190710063056.35689-3-Anson.Huang@nxp.com>
On Wed, Jul 10, 2019 at 02:30:54PM +0800, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
>
> Add i.MX8MM system counter node to enable timer-imx-sysctr
> broadcast timer driver.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Do I need to wait for patch #1 landing before I apply #3 ~ #5, or can
they be applied independently (no breaking on anything)?
Shawn
> ---
> Changes since V4:
> - update the clock info using fixed clock node;
> - correct the reg range;
> - update the interrupt number as the system counter driver ONLY uses 1 irq now.
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index b5637f8..8cf7f34 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -560,6 +560,14 @@
> #pwm-cells = <2>;
> status = "disabled";
> };
> +
> + system_counter: timer@306a0000 {
> + compatible = "nxp,sysctr-timer";
> + reg = <0x306a0000 0x20000>;
> + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&osc_24m>;
> + clock-names = "per";
> + };
> };
>
> aips3: bus@30800000 {
> --
> 2.7.4
>
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WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Anson.Huang@nxp.com
Cc: catalin.marinas@arm.com, will@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
daniel.lezcano@linaro.org, tglx@linutronix.de,
leonard.crestez@nxp.com, aisheng.dong@nxp.com,
daniel.baluta@nxp.com, ping.bai@nxp.com, l.stach@pengutronix.de,
abel.vesa@nxp.com, andrew.smirnov@gmail.com,
ccaione@baylibre.com, angus@akkea.ca, agx@sigxcpu.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH V5 3/5] arm64: dts: imx8mm: Add system counter node
Date: Mon, 22 Jul 2019 11:15:18 +0800 [thread overview]
Message-ID: <20190722031517.GT3738@dragon> (raw)
In-Reply-To: <20190710063056.35689-3-Anson.Huang@nxp.com>
On Wed, Jul 10, 2019 at 02:30:54PM +0800, Anson.Huang@nxp.com wrote:
> From: Anson Huang <Anson.Huang@nxp.com>
>
> Add i.MX8MM system counter node to enable timer-imx-sysctr
> broadcast timer driver.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Do I need to wait for patch #1 landing before I apply #3 ~ #5, or can
they be applied independently (no breaking on anything)?
Shawn
> ---
> Changes since V4:
> - update the clock info using fixed clock node;
> - correct the reg range;
> - update the interrupt number as the system counter driver ONLY uses 1 irq now.
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index b5637f8..8cf7f34 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -560,6 +560,14 @@
> #pwm-cells = <2>;
> status = "disabled";
> };
> +
> + system_counter: timer@306a0000 {
> + compatible = "nxp,sysctr-timer";
> + reg = <0x306a0000 0x20000>;
> + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&osc_24m>;
> + clock-names = "per";
> + };
> };
>
> aips3: bus@30800000 {
> --
> 2.7.4
>
next prev parent reply other threads:[~2019-07-22 3:15 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-10 6:30 [PATCH V5 1/5] clocksource: imx-sysctr: Add internal clock divider handle Anson.Huang
2019-07-10 6:30 ` Anson.Huang
2019-07-10 6:30 ` [PATCH V5 2/5] arm64: Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms Anson.Huang
2019-07-10 6:30 ` Anson.Huang
2019-07-22 3:12 ` Shawn Guo
2019-07-22 3:12 ` Shawn Guo
2019-07-10 6:30 ` [PATCH V5 3/5] arm64: dts: imx8mm: Add system counter node Anson.Huang
2019-07-10 6:30 ` Anson.Huang
2019-07-22 3:15 ` Shawn Guo [this message]
2019-07-22 3:15 ` Shawn Guo
2019-07-23 2:29 ` Anson Huang
2019-07-23 2:29 ` Anson Huang
2019-07-23 2:29 ` Anson Huang
2019-07-10 6:30 ` [PATCH V5 4/5] arm64: dts: imx8mq: " Anson.Huang
2019-07-10 6:30 ` Anson.Huang
2019-07-10 6:30 ` [PATCH V5 5/5] arm64: dts: imx8mm: Enable cpu-idle driver Anson.Huang
2019-07-10 6:30 ` Anson.Huang
2019-08-15 16:12 ` Daniel Lezcano
2019-08-15 16:12 ` Daniel Lezcano
2019-08-16 1:03 ` Anson Huang
2019-08-16 1:03 ` Anson Huang
2019-08-19 7:27 ` Shawn Guo
2019-08-19 7:27 ` Shawn Guo
2019-08-06 1:55 ` [PATCH V5 1/5] clocksource: imx-sysctr: Add internal clock divider handle Anson Huang
2019-08-06 1:55 ` Anson Huang
2019-08-06 1:55 ` Anson Huang
2019-08-06 10:27 ` Daniel Lezcano
2019-08-06 10:27 ` Daniel Lezcano
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