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From: Chuanhong Guo <gch981213@gmail.com>
To: linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK),
	devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
	FLATTENED DEVICE TREE BINDINGS),
	linux-kernel@vger.kernel.org (open list),
	linux-mips@vger.kernel.org (open list:MIPS),
	devel@driverdev.osuosl.org (open list:STAGING SUBSYSTEM)
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>, John Crispin <john@phrozen.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Weijie Gao <hackpascal@gmail.com>, NeilBrown <neil@brown.name>,
	Chuanhong Guo <gch981213@gmail.com>,
	Rob Herring <robh@kernel.org>
Subject: [PATCH v2 1/6] dt-bindings: clock: add dt binding header for mt7621-pll
Date: Wed, 24 Jul 2019 10:23:05 +0800	[thread overview]
Message-ID: <20190724022310.28010-2-gch981213@gmail.com> (raw)
In-Reply-To: <20190724022310.28010-1-gch981213@gmail.com>

This patch adds dt binding header for mediatek,mt7621-pll

Signed-off-by: Weijie Gao <hackpascal@gmail.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Change since v1:
Change commit title prefix.

 include/dt-bindings/clock/mt7621-clk.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100644 include/dt-bindings/clock/mt7621-clk.h

diff --git a/include/dt-bindings/clock/mt7621-clk.h b/include/dt-bindings/clock/mt7621-clk.h
new file mode 100644
index 000000000000..a29e14ee2efe
--- /dev/null
+++ b/include/dt-bindings/clock/mt7621-clk.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Weijie Gao <hackpascal@gmail.com>
+ */
+
+#ifndef __DT_BINDINGS_MT7621_CLK_H
+#define __DT_BINDINGS_MT7621_CLK_H
+
+#define MT7621_CLK_CPU		0
+#define MT7621_CLK_BUS		1
+
+#define MT7621_CLK_MAX		2
+
+#endif /* __DT_BINDINGS_MT7621_CLK_H */
-- 
2.21.0


WARNING: multiple messages have this Message-ID (diff)
From: Chuanhong Guo <gch981213@gmail.com>
To: "open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:MIPS" <linux-mips@vger.kernel.org>,
	"open list:STAGING SUBSYSTEM" <devel@driverdev.osuosl.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>, John Crispin <john@phrozen.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Weijie Gao <hackpascal@gmail.com>, NeilBrown <neil@brown.name>,
	Chuanhong Guo <gch981213@gmail.com>,
	Rob Herring <robh@kernel.org>
Subject: [PATCH v2 1/6] dt-bindings: clock: add dt binding header for mt7621-pll
Date: Wed, 24 Jul 2019 10:23:05 +0800	[thread overview]
Message-ID: <20190724022310.28010-2-gch981213@gmail.com> (raw)
In-Reply-To: <20190724022310.28010-1-gch981213@gmail.com>

This patch adds dt binding header for mediatek,mt7621-pll

Signed-off-by: Weijie Gao <hackpascal@gmail.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Change since v1:
Change commit title prefix.

 include/dt-bindings/clock/mt7621-clk.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100644 include/dt-bindings/clock/mt7621-clk.h

diff --git a/include/dt-bindings/clock/mt7621-clk.h b/include/dt-bindings/clock/mt7621-clk.h
new file mode 100644
index 000000000000..a29e14ee2efe
--- /dev/null
+++ b/include/dt-bindings/clock/mt7621-clk.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Weijie Gao <hackpascal@gmail.com>
+ */
+
+#ifndef __DT_BINDINGS_MT7621_CLK_H
+#define __DT_BINDINGS_MT7621_CLK_H
+
+#define MT7621_CLK_CPU		0
+#define MT7621_CLK_BUS		1
+
+#define MT7621_CLK_MAX		2
+
+#endif /* __DT_BINDINGS_MT7621_CLK_H */
-- 
2.21.0

  reply	other threads:[~2019-07-24  2:24 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-24  2:23 [PATCH v2 0/6] MIPS: ralink: add CPU clock detection for MT7621 Chuanhong Guo
2019-07-24  2:23 ` Chuanhong Guo
2019-07-24  2:23 ` Chuanhong Guo [this message]
2019-07-24  2:23   ` [PATCH v2 1/6] dt-bindings: clock: add dt binding header for mt7621-pll Chuanhong Guo
2019-07-24  2:23 ` [PATCH v2 2/6] MIPS: ralink: drop ralink_clk_init for mt7621 Chuanhong Guo
2019-07-24  2:23   ` Chuanhong Guo
2019-07-24  2:23 ` [PATCH v2 3/6] MIPS: ralink: add clock device providing cpu/bus clock " Chuanhong Guo
2019-07-24  2:23   ` Chuanhong Guo
2019-07-24  2:23 ` [PATCH v2 4/6] dt: bindings: add mt7621-pll dt binding documentation Chuanhong Guo
2019-07-24  2:23   ` Chuanhong Guo
2019-07-29 17:33   ` Paul Burton
2019-08-13 15:51   ` Rob Herring
2019-08-17 14:42     ` Chuanhong Guo
2019-08-17 14:42       ` Chuanhong Guo
2019-08-17 15:39       ` Oleksij Rempel
2019-08-17 16:22         ` Chuanhong Guo
2019-08-17 18:05           ` Oleksij Rempel
2019-08-18  2:29             ` Chuanhong Guo
2019-08-18  2:29               ` Chuanhong Guo
2019-08-18  6:10               ` Oleksij Rempel
2019-08-18  7:19                 ` Chuanhong Guo
2019-08-18  7:59                   ` Oleksij Rempel
2019-08-18  7:59                     ` Oleksij Rempel
2019-08-18  8:26                     ` Chuanhong Guo
2019-08-18  8:44                       ` Chuanhong Guo
2019-08-18  9:51                         ` Oleksij Rempel
2019-08-18 10:07                           ` Chuanhong Guo
2019-08-18 10:07                             ` Chuanhong Guo
2019-08-17 15:40       ` Oleksij Rempel
2019-07-24  2:23 ` [PATCH v2 5/6] staging: mt7621-dts: fix register range of memc node in mt7621.dtsi Chuanhong Guo
2019-07-24  2:23   ` Chuanhong Guo
2019-07-24  2:23 ` [PATCH v2 6/6] staging: mt7621-dts: add dt nodes for mt7621-pll Chuanhong Guo
2019-07-24  2:23   ` Chuanhong Guo

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