From: Andrew Lunn <andrew@lunn.ch>
To: Simon Horman <horms+renesas@verge.net.au>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
linux-renesas-soc@vger.kernel.org,
Wolfram Sang <wsa@the-dreams.de>,
Magnus Damm <magnus.damm@gmail.com>,
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps
Date: Mon, 29 Jul 2019 16:40:27 +0200 [thread overview]
Message-ID: <20190729144027.GD4110@lunn.ch> (raw)
In-Reply-To: <20190729080356.13023-1-horms+renesas@verge.net.au>
On Mon, Jul 29, 2019 at 10:03:56AM +0200, Simon Horman wrote:
> * According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
> August 24, 2018, the TX clock internal delay mode isn't supported
> on R-Car E3 (r8a77990) and D3 (r8a77995).
>
> * TX clock internal delay mode is required for reliable 1Gbps communication
> using the KSZ9031RNX phy present on the Ebisu and Draak boards.
>
> Thus, the E3 based Ebisu and D3 based Draak boards can not reliably
> use 1Gbps and the speed should be limited to 100Mbps.
>
> Based on work by Kazuya Mizuguchi.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Lunn <andrew@lunn.ch>
To: Simon Horman <horms+renesas@verge.net.au>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Wolfram Sang <wsa@the-dreams.de>,
Magnus Damm <magnus.damm@gmail.com>,
linux-renesas-soc@vger.kernel.org,
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps
Date: Mon, 29 Jul 2019 16:40:27 +0200 [thread overview]
Message-ID: <20190729144027.GD4110@lunn.ch> (raw)
In-Reply-To: <20190729080356.13023-1-horms+renesas@verge.net.au>
On Mon, Jul 29, 2019 at 10:03:56AM +0200, Simon Horman wrote:
> * According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
> August 24, 2018, the TX clock internal delay mode isn't supported
> on R-Car E3 (r8a77990) and D3 (r8a77995).
>
> * TX clock internal delay mode is required for reliable 1Gbps communication
> using the KSZ9031RNX phy present on the Ebisu and Draak boards.
>
> Thus, the E3 based Ebisu and D3 based Draak boards can not reliably
> use 1Gbps and the speed should be limited to 100Mbps.
>
> Based on work by Kazuya Mizuguchi.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
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next prev parent reply other threads:[~2019-07-29 14:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-29 8:03 [PATCH v2] arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps Simon Horman
2019-07-29 8:03 ` Simon Horman
2019-07-29 8:34 ` Wolfram Sang
2019-07-29 8:34 ` Wolfram Sang
2019-07-29 14:40 ` Andrew Lunn [this message]
2019-07-29 14:40 ` Andrew Lunn
2019-08-19 13:35 ` Geert Uytterhoeven
2019-08-19 13:35 ` Geert Uytterhoeven
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