From: Manasi Navare <manasi.d.navare@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits
Date: Mon, 29 Jul 2019 12:17:53 -0700 [thread overview]
Message-ID: <20190729191753.GI2632@intel.com> (raw)
In-Reply-To: <20190712202938.GQ5942@intel.com>
Hi Ville,
Thanks for your review, so do we want to merge this as is or
do we need some function to reject the 8K mode on ICL in intel_dp_mode_valid()?
Manasi
On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote:
> On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote:
> > On ICL+, the vertical limits for the transcoders are increased to 8192
> > and horizontal limits are bumped to 16K so bump up
> > limits in intel_mode_valid()
> >
> > v4:
> > * Increase the hdisplay to 16K (Ville)
> > v3:
> > * Supported starting ICL (Ville)
> > * Use the higher limits from TRANS_VTOTAL register (Ville)
> > v2:
> > * Checkpatch warning (Manasi)
> >
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++--
> > 1 file changed, 7 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index f07081815b80..15006764862b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
> > DRM_MODE_FLAG_CLKDIV2))
> > return MODE_BAD;
> >
> > - if (INTEL_GEN(dev_priv) >= 9 ||
> > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> > + if (INTEL_GEN(dev_priv) >= 11) {
> > + hdisplay_max = 16384;
> > + vdisplay_max = 8192;
> > + htotal_max = 16384;
> > + vtotal_max = 8192;
> > + } else if (INTEL_GEN(dev_priv) >= 9 ||
> > + IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> > hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
> > vdisplay_max = 4096;
> > htotal_max = 8192;
> > --
> > 2.19.1
>
> --
> Ville Syrjälä
> Intel
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next prev parent reply other threads:[~2019-07-29 19:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-12 20:22 [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Manasi Navare
2019-07-12 20:22 ` [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height Manasi Navare
2019-07-12 20:30 ` Ville Syrjälä
2019-07-12 20:38 ` [PATCH v5] " Manasi Navare
2019-07-12 20:29 ` [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Ville Syrjälä
2019-07-29 19:17 ` Manasi Navare [this message]
2019-09-13 13:36 ` Maarten Lankhorst
2019-09-16 19:19 ` Manasi Navare
2019-09-17 10:55 ` Maarten Lankhorst
2019-07-12 21:24 ` ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) Patchwork
2019-07-14 16:12 ` ✓ Fi.CI.IGT: " Patchwork
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