* [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits
@ 2019-07-12 20:22 Manasi Navare
2019-07-12 20:22 ` [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height Manasi Navare
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Manasi Navare @ 2019-07-12 20:22 UTC (permalink / raw)
To: intel-gfx
On ICL+, the vertical limits for the transcoders are increased to 8192
and horizontal limits are bumped to 16K so bump up
limits in intel_mode_valid()
v4:
* Increase the hdisplay to 16K (Ville)
v3:
* Supported starting ICL (Ville)
* Use the higher limits from TRANS_VTOTAL register (Ville)
v2:
* Checkpatch warning (Manasi)
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f07081815b80..15006764862b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
DRM_MODE_FLAG_CLKDIV2))
return MODE_BAD;
- if (INTEL_GEN(dev_priv) >= 9 ||
- IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
+ if (INTEL_GEN(dev_priv) >= 11) {
+ hdisplay_max = 16384;
+ vdisplay_max = 8192;
+ htotal_max = 16384;
+ vtotal_max = 8192;
+ } else if (INTEL_GEN(dev_priv) >= 9 ||
+ IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
vdisplay_max = 4096;
htotal_max = 8192;
--
2.19.1
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^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height 2019-07-12 20:22 [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Manasi Navare @ 2019-07-12 20:22 ` Manasi Navare 2019-07-12 20:30 ` Ville Syrjälä 2019-07-12 20:38 ` [PATCH v5] " Manasi Navare 2019-07-12 20:29 ` [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Ville Syrjälä ` (2 subsequent siblings) 3 siblings, 2 replies; 11+ messages in thread From: Manasi Navare @ 2019-07-12 20:22 UTC (permalink / raw) To: intel-gfx On ICL+, the max supported plane height is 4320, so bump it up To support 4320, we need to increase the number of bits used to read plane_height to 13 as opposed to older 12 bits. v3: * Use 0xffff for mask as extra bits are mbz (Ville) v2: * ICL plane height supported is 4320 (Ville) * Add a new line between max width and max height (Jose) Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 15006764862b..5103504bbbec 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, return 5120; } +static int skl_max_plane_height(void) +{ + return 4096; +} + +static int icl_max_plane_height(void) +{ + return 4320; +} + static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, int main_x, int main_y, u32 main_offset) { @@ -3391,7 +3401,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) int w = drm_rect_width(&plane_state->base.src) >> 16; int h = drm_rect_height(&plane_state->base.src) >> 16; int max_width; - int max_height = 4096; + int max_height; u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; if (INTEL_GEN(dev_priv) >= 11) @@ -3401,6 +3411,11 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) else max_width = skl_max_plane_width(fb, 0, rotation); + if (INTEL_GEN(dev_priv) >= 11) + max_height = icl_max_plane_height(); + else + max_height = skl_max_plane_height(); + if (w > max_width || h > max_height) { DRM_DEBUG_KMS("requested Y/RGB source size %dx%d too big (limit %dx%d)\n", w, h, max_width, max_height); @@ -9865,7 +9880,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); val = I915_READ(PLANE_SIZE(pipe, plane_id)); - fb->height = ((val >> 16) & 0xfff) + 1; + fb->height = ((val >> 16) & 0xffff) + 1; fb->width = ((val >> 0) & 0x1fff) + 1; val = I915_READ(PLANE_STRIDE(pipe, plane_id)); -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height 2019-07-12 20:22 ` [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height Manasi Navare @ 2019-07-12 20:30 ` Ville Syrjälä 2019-07-12 20:38 ` [PATCH v5] " Manasi Navare 1 sibling, 0 replies; 11+ messages in thread From: Ville Syrjälä @ 2019-07-12 20:30 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx On Fri, Jul 12, 2019 at 01:22:14PM -0700, Manasi Navare wrote: > On ICL+, the max supported plane height is 4320, so bump it up > To support 4320, we need to increase the number of bits used to > read plane_height to 13 as opposed to older 12 bits. > > v3: > * Use 0xffff for mask as extra bits are mbz (Ville) > v2: > * ICL plane height supported is 4320 (Ville) > * Add a new line between max width and max height (Jose) > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++-- > 1 file changed, 17 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 15006764862b..5103504bbbec 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, > return 5120; > } > > +static int skl_max_plane_height(void) > +{ > + return 4096; > +} > + > +static int icl_max_plane_height(void) > +{ > + return 4320; > +} > + > static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, > int main_x, int main_y, u32 main_offset) > { > @@ -3391,7 +3401,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) > int w = drm_rect_width(&plane_state->base.src) >> 16; > int h = drm_rect_height(&plane_state->base.src) >> 16; > int max_width; > - int max_height = 4096; > + int max_height; > u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; > > if (INTEL_GEN(dev_priv) >= 11) > @@ -3401,6 +3411,11 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) > else > max_width = skl_max_plane_width(fb, 0, rotation); > > + if (INTEL_GEN(dev_priv) >= 11) > + max_height = icl_max_plane_height(); > + else > + max_height = skl_max_plane_height(); > + > if (w > max_width || h > max_height) { > DRM_DEBUG_KMS("requested Y/RGB source size %dx%d too big (limit %dx%d)\n", > w, h, max_width, max_height); > @@ -9865,7 +9880,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, > offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); > > val = I915_READ(PLANE_SIZE(pipe, plane_id)); > - fb->height = ((val >> 16) & 0xfff) + 1; > + fb->height = ((val >> 16) & 0xffff) + 1; > fb->width = ((val >> 0) & 0x1fff) + 1; I would adjust the mask for width as well. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > val = I915_READ(PLANE_STRIDE(pipe, plane_id)); > -- > 2.19.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v5] drm/i915/display/icl: Bump up the plane/fb height 2019-07-12 20:22 ` [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height Manasi Navare 2019-07-12 20:30 ` Ville Syrjälä @ 2019-07-12 20:38 ` Manasi Navare 1 sibling, 0 replies; 11+ messages in thread From: Manasi Navare @ 2019-07-12 20:38 UTC (permalink / raw) To: intel-gfx On ICL+, the max supported plane height is 4320, so bump it up To support 4320, we need to increase the number of bits used to read plane_height to 13 as opposed to older 12 bits. v4: * Adjust the width mask also since extra bits are mbz (Ville) v3: * Use 0xffff for mask as extra bits are mbz (Ville) v2: * ICL plane height supported is 4320 (Ville) * Add a new line between max width and max height (Jose) Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 21 +++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 15006764862b..f7e31a89ed2a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3343,6 +3343,16 @@ static int icl_max_plane_width(const struct drm_framebuffer *fb, return 5120; } +static int skl_max_plane_height(void) +{ + return 4096; +} + +static int icl_max_plane_height(void) +{ + return 4320; +} + static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, int main_x, int main_y, u32 main_offset) { @@ -3391,7 +3401,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) int w = drm_rect_width(&plane_state->base.src) >> 16; int h = drm_rect_height(&plane_state->base.src) >> 16; int max_width; - int max_height = 4096; + int max_height; u32 alignment, offset, aux_offset = plane_state->color_plane[1].offset; if (INTEL_GEN(dev_priv) >= 11) @@ -3401,6 +3411,11 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state) else max_width = skl_max_plane_width(fb, 0, rotation); + if (INTEL_GEN(dev_priv) >= 11) + max_height = icl_max_plane_height(); + else + max_height = skl_max_plane_height(); + if (w > max_width || h > max_height) { DRM_DEBUG_KMS("requested Y/RGB source size %dx%d too big (limit %dx%d)\n", w, h, max_width, max_height); @@ -9865,8 +9880,8 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, offset = I915_READ(PLANE_OFFSET(pipe, plane_id)); val = I915_READ(PLANE_SIZE(pipe, plane_id)); - fb->height = ((val >> 16) & 0xfff) + 1; - fb->width = ((val >> 0) & 0x1fff) + 1; + fb->height = ((val >> 16) & 0xffff) + 1; + fb->width = ((val >> 0) & 0xffff) + 1; val = I915_READ(PLANE_STRIDE(pipe, plane_id)); stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0); -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits 2019-07-12 20:22 [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Manasi Navare 2019-07-12 20:22 ` [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height Manasi Navare @ 2019-07-12 20:29 ` Ville Syrjälä 2019-07-29 19:17 ` Manasi Navare 2019-07-12 21:24 ` ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) Patchwork 2019-07-14 16:12 ` ✓ Fi.CI.IGT: " Patchwork 3 siblings, 1 reply; 11+ messages in thread From: Ville Syrjälä @ 2019-07-12 20:29 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote: > On ICL+, the vertical limits for the transcoders are increased to 8192 > and horizontal limits are bumped to 16K so bump up > limits in intel_mode_valid() > > v4: > * Increase the hdisplay to 16K (Ville) > v3: > * Supported starting ICL (Ville) > * Use the higher limits from TRANS_VTOTAL register (Ville) > v2: > * Checkpatch warning (Manasi) > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index f07081815b80..15006764862b 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev, > DRM_MODE_FLAG_CLKDIV2)) > return MODE_BAD; > > - if (INTEL_GEN(dev_priv) >= 9 || > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > + if (INTEL_GEN(dev_priv) >= 11) { > + hdisplay_max = 16384; > + vdisplay_max = 8192; > + htotal_max = 16384; > + vtotal_max = 8192; > + } else if (INTEL_GEN(dev_priv) >= 9 || > + IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */ > vdisplay_max = 4096; > htotal_max = 8192; > -- > 2.19.1 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits 2019-07-12 20:29 ` [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Ville Syrjälä @ 2019-07-29 19:17 ` Manasi Navare 2019-09-13 13:36 ` Maarten Lankhorst 0 siblings, 1 reply; 11+ messages in thread From: Manasi Navare @ 2019-07-29 19:17 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx Hi Ville, Thanks for your review, so do we want to merge this as is or do we need some function to reject the 8K mode on ICL in intel_dp_mode_valid()? Manasi On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote: > On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote: > > On ICL+, the vertical limits for the transcoders are increased to 8192 > > and horizontal limits are bumped to 16K so bump up > > limits in intel_mode_valid() > > > > v4: > > * Increase the hdisplay to 16K (Ville) > > v3: > > * Supported starting ICL (Ville) > > * Use the higher limits from TRANS_VTOTAL register (Ville) > > v2: > > * Checkpatch warning (Manasi) > > > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > --- > > drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > > index f07081815b80..15006764862b 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev, > > DRM_MODE_FLAG_CLKDIV2)) > > return MODE_BAD; > > > > - if (INTEL_GEN(dev_priv) >= 9 || > > - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > > + if (INTEL_GEN(dev_priv) >= 11) { > > + hdisplay_max = 16384; > > + vdisplay_max = 8192; > > + htotal_max = 16384; > > + vtotal_max = 8192; > > + } else if (INTEL_GEN(dev_priv) >= 9 || > > + IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > > hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */ > > vdisplay_max = 4096; > > htotal_max = 8192; > > -- > > 2.19.1 > > -- > Ville Syrjälä > Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits 2019-07-29 19:17 ` Manasi Navare @ 2019-09-13 13:36 ` Maarten Lankhorst 2019-09-16 19:19 ` Manasi Navare 0 siblings, 1 reply; 11+ messages in thread From: Maarten Lankhorst @ 2019-09-13 13:36 UTC (permalink / raw) To: Manasi Navare, Ville Syrjälä; +Cc: intel-gfx Hey, Op 29-07-2019 om 21:17 schreef Manasi Navare: > Hi Ville, > > Thanks for your review, so do we want to merge this as is or > do we need some function to reject the 8K mode on ICL in intel_dp_mode_valid()? > > Manasi I've pushed this series as-is because it blocks my bigjoiner work. We should probably reject modes in the connector specific functions if we can't handle it. :) > > On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote: >> On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote: >>> On ICL+, the vertical limits for the transcoders are increased to 8192 >>> and horizontal limits are bumped to 16K so bump up >>> limits in intel_mode_valid() >>> >>> v4: >>> * Increase the hdisplay to 16K (Ville) >>> v3: >>> * Supported starting ICL (Ville) >>> * Use the higher limits from TRANS_VTOTAL register (Ville) >>> v2: >>> * Checkpatch warning (Manasi) >>> >>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> >>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >>> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> >> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> >> >>> --- >>> drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++-- >>> 1 file changed, 7 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c >>> index f07081815b80..15006764862b 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_display.c >>> +++ b/drivers/gpu/drm/i915/display/intel_display.c >>> @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev, >>> DRM_MODE_FLAG_CLKDIV2)) >>> return MODE_BAD; >>> >>> - if (INTEL_GEN(dev_priv) >= 9 || >>> - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { >>> + if (INTEL_GEN(dev_priv) >= 11) { >>> + hdisplay_max = 16384; >>> + vdisplay_max = 8192; >>> + htotal_max = 16384; >>> + vtotal_max = 8192; >>> + } else if (INTEL_GEN(dev_priv) >= 9 || >>> + IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { >>> hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */ >>> vdisplay_max = 4096; >>> htotal_max = 8192; >>> -- >>> 2.19.1 >> -- >> Ville Syrjälä >> Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits 2019-09-13 13:36 ` Maarten Lankhorst @ 2019-09-16 19:19 ` Manasi Navare 2019-09-17 10:55 ` Maarten Lankhorst 0 siblings, 1 reply; 11+ messages in thread From: Manasi Navare @ 2019-09-16 19:19 UTC (permalink / raw) To: Maarten Lankhorst; +Cc: intel-gfx On Fri, Sep 13, 2019 at 03:36:39PM +0200, Maarten Lankhorst wrote: > Hey, > > Op 29-07-2019 om 21:17 schreef Manasi Navare: > > Hi Ville, > > > > Thanks for your review, so do we want to merge this as is or > > do we need some function to reject the 8K mode on ICL in intel_dp_mode_valid()? > > > > Manasi > > I've pushed this series as-is because it blocks my bigjoiner work. We should probably reject modes in the connector specific functions if we can't handle it. :) Thanks Maarten. So in case of intel_dp_mode_valid() for example the 8K mode will be rejected if big joiner not supported correct? Manasi > > > > > > On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote: > >> On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote: > >>> On ICL+, the vertical limits for the transcoders are increased to 8192 > >>> and horizontal limits are bumped to 16K so bump up > >>> limits in intel_mode_valid() > >>> > >>> v4: > >>> * Increase the hdisplay to 16K (Ville) > >>> v3: > >>> * Supported starting ICL (Ville) > >>> * Use the higher limits from TRANS_VTOTAL register (Ville) > >>> v2: > >>> * Checkpatch warning (Manasi) > >>> > >>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > >>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > >>> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > >> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > >> > >>> --- > >>> drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++-- > >>> 1 file changed, 7 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > >>> index f07081815b80..15006764862b 100644 > >>> --- a/drivers/gpu/drm/i915/display/intel_display.c > >>> +++ b/drivers/gpu/drm/i915/display/intel_display.c > >>> @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev, > >>> DRM_MODE_FLAG_CLKDIV2)) > >>> return MODE_BAD; > >>> > >>> - if (INTEL_GEN(dev_priv) >= 9 || > >>> - IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > >>> + if (INTEL_GEN(dev_priv) >= 11) { > >>> + hdisplay_max = 16384; > >>> + vdisplay_max = 8192; > >>> + htotal_max = 16384; > >>> + vtotal_max = 8192; > >>> + } else if (INTEL_GEN(dev_priv) >= 9 || > >>> + IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { > >>> hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */ > >>> vdisplay_max = 4096; > >>> htotal_max = 8192; > >>> -- > >>> 2.19.1 > >> -- > >> Ville Syrjälä > >> Intel > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits 2019-09-16 19:19 ` Manasi Navare @ 2019-09-17 10:55 ` Maarten Lankhorst 0 siblings, 0 replies; 11+ messages in thread From: Maarten Lankhorst @ 2019-09-17 10:55 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx Op 16-09-2019 om 21:19 schreef Manasi Navare: > On Fri, Sep 13, 2019 at 03:36:39PM +0200, Maarten Lankhorst wrote: >> Hey, >> >> Op 29-07-2019 om 21:17 schreef Manasi Navare: >>> Hi Ville, >>> >>> Thanks for your review, so do we want to merge this as is or >>> do we need some function to reject the 8K mode on ICL in intel_dp_mode_valid()? >>> >>> Manasi >> I've pushed this series as-is because it blocks my bigjoiner work. We should probably reject modes in the connector specific functions if we can't handle it. :) > Thanks Maarten. So in case of intel_dp_mode_valid() for example the 8K mode will be rejected if big joiner not supported correct? Yeah, limits are too high. :) _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) 2019-07-12 20:22 [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Manasi Navare 2019-07-12 20:22 ` [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height Manasi Navare 2019-07-12 20:29 ` [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Ville Syrjälä @ 2019-07-12 21:24 ` Patchwork 2019-07-14 16:12 ` ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2019-07-12 21:24 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx == Series Details == Series: series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) URL : https://patchwork.freedesktop.org/series/63663/ State : success == Summary == CI Bug Log - changes from CI_DRM_6480 -> Patchwork_13649 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/ Known issues ------------ Here are the changes found in Patchwork_13649 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [PASS][3] -> [DMESG-WARN][4] ([fdo#102614]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html #### Possible fixes #### * igt@gem_ctx_create@basic-files: - fi-icl-dsi: [INCOMPLETE][5] ([fdo#107713] / [fdo#109100]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-icl-dsi/igt@gem_ctx_create@basic-files.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/fi-icl-dsi/igt@gem_ctx_create@basic-files.html * {igt@gem_ctx_switch@legacy-render}: - fi-icl-u3: [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-icl-u3/igt@gem_ctx_switch@legacy-render.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/fi-icl-u3/igt@gem_ctx_switch@legacy-render.html * igt@i915_selftest@live_contexts: - fi-skl-iommu: [INCOMPLETE][9] ([fdo#111050]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/fi-skl-iommu/igt@i915_selftest@live_contexts.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/fi-skl-iommu/igt@i915_selftest@live_contexts.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050 Participating hosts (53 -> 45) ------------------------------ Additional (2): fi-apl-guc fi-cml-u Missing (10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus fi-kbl-r Build changes ------------- * Linux: CI_DRM_6480 -> Patchwork_13649 CI_DRM_6480: a4856ee98f5d0058656d4fd8efb4ffa433bdfaa4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5096: bb4d55a02dd3e1971f2c091a13b6bd7f0b496e40 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13649: 6142cf0e6d9b4c6082078c5f967c98235551512c @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 6142cf0e6d9b drm/i915/display/icl: Bump up the plane/fb height c9444846a700 drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) 2019-07-12 20:22 [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Manasi Navare ` (2 preceding siblings ...) 2019-07-12 21:24 ` ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) Patchwork @ 2019-07-14 16:12 ` Patchwork 3 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2019-07-14 16:12 UTC (permalink / raw) To: Manasi Navare; +Cc: intel-gfx == Series Details == Series: series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) URL : https://patchwork.freedesktop.org/series/63663/ State : success == Summary == CI Bug Log - changes from CI_DRM_6480_full -> Patchwork_13649_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_13649_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy: - shard-hsw: [PASS][1] -> [FAIL][2] ([fdo#105767]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-hsw5/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][3] -> [FAIL][4] ([fdo#105363]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render: - shard-iclb: [PASS][5] -> [FAIL][6] ([fdo#103167]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu: - shard-hsw: [PASS][7] -> [SKIP][8] ([fdo#109271]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-hsw4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-hsw5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-cpu.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-apl: [PASS][9] -> [DMESG-WARN][10] ([fdo#108566]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-apl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][11] -> [FAIL][12] ([fdo#108145] / [fdo#110403]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#108341]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-iclb6/igt@kms_psr@no_drrs.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_suspend: - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109441]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-iclb2/igt@kms_psr@psr2_suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-iclb1/igt@kms_psr@psr2_suspend.html * igt@kms_setmode@basic: - shard-kbl: [PASS][17] -> [FAIL][18] ([fdo#99912]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl6/igt@kms_setmode@basic.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl3/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-kbl: [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html #### Possible fixes #### * igt@i915_pm_backlight@fade_with_suspend: - shard-iclb: [INCOMPLETE][21] ([fdo#107713] / [fdo#107820]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-iclb5/igt@i915_pm_backlight@fade_with_suspend.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-iclb5/igt@i915_pm_backlight@fade_with_suspend.html * igt@i915_suspend@sysfs-reader: - shard-apl: [DMESG-WARN][23] ([fdo#108566]) -> [PASS][24] +3 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-apl7/igt@i915_suspend@sysfs-reader.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-apl5/igt@i915_suspend@sysfs-reader.html * igt@kms_busy@extended-modeset-hang-newfb-render-c: - shard-kbl: [DMESG-WARN][25] ([fdo#103313] / [fdo#103558] / [fdo#105602] / [fdo#110222]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl1/igt@kms_busy@extended-modeset-hang-newfb-render-c.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl4/igt@kms_busy@extended-modeset-hang-newfb-render-c.html * igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent: - shard-snb: [SKIP][27] ([fdo#109271]) -> [PASS][28] +1 similar issue [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-snb6/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-snb7/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html * igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-ytiled: - shard-skl: [FAIL][29] ([fdo#103184] / [fdo#103232] / [fdo#108145]) -> [PASS][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl8/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-ytiled.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl8/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-ytiled.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [FAIL][31] ([fdo#105363]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: [FAIL][33] ([fdo#105363]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-suspend: - shard-kbl: [DMESG-WARN][35] ([fdo#103558] / [fdo#105602] / [fdo#108566]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl1/igt@kms_flip@flip-vs-suspend.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl4/igt@kms_flip@flip-vs-suspend.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: [FAIL][37] ([fdo#103167]) -> [PASS][38] +4 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-skl: [FAIL][39] ([fdo#108040]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt: - shard-skl: [FAIL][41] ([fdo#103167]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html * igt@kms_pipe_crc_basic@bad-source: - shard-kbl: [DMESG-WARN][43] ([fdo#103558] / [fdo#105602]) -> [PASS][44] +11 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl1/igt@kms_pipe_crc_basic@bad-source.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl4/igt@kms_pipe_crc_basic@bad-source.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][45] ([fdo#108145]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_psr@psr2_primary_page_flip: - shard-iclb: [SKIP][47] ([fdo#109441]) -> [PASS][48] +5 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-iclb4/igt@kms_psr@psr2_primary_page_flip.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html * igt@kms_universal_plane@universal-plane-pipe-a-functional: - shard-skl: [FAIL][49] -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-skl8/igt@kms_universal_plane@universal-plane-pipe-a-functional.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-skl8/igt@kms_universal_plane@universal-plane-pipe-a-functional.html * igt@perf_pmu@rc6: - shard-kbl: [SKIP][51] ([fdo#109271]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl7/igt@perf_pmu@rc6.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl2/igt@perf_pmu@rc6.html #### Warnings #### * igt@kms_atomic_transition@4x-modeset-transitions: - shard-kbl: [SKIP][53] ([fdo#105602] / [fdo#109271] / [fdo#109278]) -> [SKIP][54] ([fdo#109271] / [fdo#109278]) +1 similar issue [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl1/igt@kms_atomic_transition@4x-modeset-transitions.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl4/igt@kms_atomic_transition@4x-modeset-transitions.html * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: [SKIP][55] ([fdo#109349]) -> [DMESG-WARN][56] ([fdo#107724]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render: - shard-kbl: [SKIP][57] ([fdo#105602] / [fdo#109271]) -> [SKIP][58] ([fdo#109271]) +10 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6480/shard-kbl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/shard-kbl4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render.html [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313 [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#107820]: https://bugs.freedesktop.org/show_bug.cgi?id=107820 [fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110222]: https://bugs.freedesktop.org/show_bug.cgi?id=110222 [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_6480 -> Patchwork_13649 CI_DRM_6480: a4856ee98f5d0058656d4fd8efb4ffa433bdfaa4 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5096: bb4d55a02dd3e1971f2c091a13b6bd7f0b496e40 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13649: 6142cf0e6d9b4c6082078c5f967c98235551512c @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13649/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2019-09-17 10:55 UTC | newest] Thread overview: 11+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-07-12 20:22 [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Manasi Navare 2019-07-12 20:22 ` [PATCH v4 2/2] drm/i915/display/icl: Bump up the plane/fb height Manasi Navare 2019-07-12 20:30 ` Ville Syrjälä 2019-07-12 20:38 ` [PATCH v5] " Manasi Navare 2019-07-12 20:29 ` [PATCH v4 1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits Ville Syrjälä 2019-07-29 19:17 ` Manasi Navare 2019-09-13 13:36 ` Maarten Lankhorst 2019-09-16 19:19 ` Manasi Navare 2019-09-17 10:55 ` Maarten Lankhorst 2019-07-12 21:24 ` ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/i915/display/icl: Bump up the hdisplay and vdisplay as per transcoder limits (rev2) Patchwork 2019-07-14 16:12 ` ✓ Fi.CI.IGT: " Patchwork
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