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From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>,
	kvm-ppc@vger.kernel.org, Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH 2/3] powerpc/64s/radix: all CPUs should flush local translation structure before turning MMU
Date: Fri, 16 Aug 2019 04:07:32 +0000	[thread overview]
Message-ID: <20190816040733.5737-3-npiggin@gmail.com> (raw)
In-Reply-To: <20190816040733.5737-1-npiggin@gmail.com>

Rather than sprinkle various translation structure invalidations
around different places in early boot, have each CPU flush everything
from its local translation structures before enabling its MMU.

Radix guests can execute tlbie(l), so have them tlbiel_all in the same
place as radix host does.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/mm/book3s64/radix_pgtable.c | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
index d60cfa05447a..839e01795211 100644
--- a/arch/powerpc/mm/book3s64/radix_pgtable.c
+++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
@@ -382,11 +382,6 @@ static void __init radix_init_pgtable(void)
 	 */
 	register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12);
 	pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd);
-	asm volatile("ptesync" : : : "memory");
-	asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
-		     "r" (TLBIEL_INVAL_SET_LPID), "r" (0));
-	asm volatile("eieio; tlbsync; ptesync" : : : "memory");
-	trace_tlbie(0, 0, TLBIEL_INVAL_SET_LPID, 0, 2, 1, 1);
 
 	/*
 	 * The init_mm context is given the first available (non-zero) PID,
@@ -633,8 +628,7 @@ void __init radix__early_init_mmu(void)
 	radix_init_pgtable();
 	/* Switch to the guard PID before turning on MMU */
 	radix__switch_mmu_context(NULL, &init_mm);
-	if (cpu_has_feature(CPU_FTR_HVMODE))
-		tlbiel_all();
+	tlbiel_all();
 }
 
 void radix__early_init_mmu_secondary(void)
@@ -653,8 +647,7 @@ void radix__early_init_mmu_secondary(void)
 	}
 
 	radix__switch_mmu_context(NULL, &init_mm);
-	if (cpu_has_feature(CPU_FTR_HVMODE))
-		tlbiel_all();
+	tlbiel_all();
 }
 
 void radix__mmu_cleanup_all(void)
-- 
2.22.0

WARNING: multiple messages have this Message-ID (diff)
From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>,
	kvm-ppc@vger.kernel.org, Nicholas Piggin <npiggin@gmail.com>
Subject: [PATCH 2/3] powerpc/64s/radix: all CPUs should flush local translation structure before turning MMU on
Date: Fri, 16 Aug 2019 14:07:32 +1000	[thread overview]
Message-ID: <20190816040733.5737-3-npiggin@gmail.com> (raw)
In-Reply-To: <20190816040733.5737-1-npiggin@gmail.com>

Rather than sprinkle various translation structure invalidations
around different places in early boot, have each CPU flush everything
from its local translation structures before enabling its MMU.

Radix guests can execute tlbie(l), so have them tlbiel_all in the same
place as radix host does.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/powerpc/mm/book3s64/radix_pgtable.c | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c
index d60cfa05447a..839e01795211 100644
--- a/arch/powerpc/mm/book3s64/radix_pgtable.c
+++ b/arch/powerpc/mm/book3s64/radix_pgtable.c
@@ -382,11 +382,6 @@ static void __init radix_init_pgtable(void)
 	 */
 	register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12);
 	pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd);
-	asm volatile("ptesync" : : : "memory");
-	asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
-		     "r" (TLBIEL_INVAL_SET_LPID), "r" (0));
-	asm volatile("eieio; tlbsync; ptesync" : : : "memory");
-	trace_tlbie(0, 0, TLBIEL_INVAL_SET_LPID, 0, 2, 1, 1);
 
 	/*
 	 * The init_mm context is given the first available (non-zero) PID,
@@ -633,8 +628,7 @@ void __init radix__early_init_mmu(void)
 	radix_init_pgtable();
 	/* Switch to the guard PID before turning on MMU */
 	radix__switch_mmu_context(NULL, &init_mm);
-	if (cpu_has_feature(CPU_FTR_HVMODE))
-		tlbiel_all();
+	tlbiel_all();
 }
 
 void radix__early_init_mmu_secondary(void)
@@ -653,8 +647,7 @@ void radix__early_init_mmu_secondary(void)
 	}
 
 	radix__switch_mmu_context(NULL, &init_mm);
-	if (cpu_has_feature(CPU_FTR_HVMODE))
-		tlbiel_all();
+	tlbiel_all();
 }
 
 void radix__mmu_cleanup_all(void)
-- 
2.22.0


  parent reply	other threads:[~2019-08-16  4:07 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-16  4:07 [PATCH 0/3] series to optionally disable tlbie for 64s/radix Nicholas Piggin
2019-08-16  4:07 ` Nicholas Piggin
2019-08-16  4:07 ` [PATCH 1/3] powerpc/64s: Remove mmu_partition_table_set Nicholas Piggin
2019-08-16  4:07   ` Nicholas Piggin
2019-08-16  4:07 ` Nicholas Piggin [this message]
2019-08-16  4:07   ` [PATCH 2/3] powerpc/64s/radix: all CPUs should flush local translation structure before turning MMU on Nicholas Piggin
2019-08-19  2:00   ` [PATCH 2/3] powerpc/64s/radix: all CPUs should flush local translation structure before turning Michael Ellerman
2019-08-19  2:00     ` [PATCH 2/3] powerpc/64s/radix: all CPUs should flush local translation structure before turning MMU on Michael Ellerman
2019-08-19 13:06     ` [PATCH 2/3] powerpc/64s/radix: all CPUs should flush local translation structure before turning Nicholas Piggin
2019-08-19 13:06       ` [PATCH 2/3] powerpc/64s/radix: all CPUs should flush local translation structure before turning MMU on Nicholas Piggin
2019-08-16  4:07 ` [PATCH 3/3] powerpc/64s: introduce options to disable use of the tlbie instruction Nicholas Piggin
2019-08-16  4:07   ` Nicholas Piggin

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