From: Stephen Boyd <sboyd@kernel.org>
To: Daniel Baluta <daniel.baluta@nxp.com>,
Leonard Crestez <leonard.crestez@nxp.com>,
Peng Fan <peng.fan@nxp.com>, Shawn Guo <shawnguo@kernel.org>
Cc: Jacky Bai <ping.bai@nxp.com>,
Michael Turquette <mturquette@baylibre.com>,
Abel Vesa <abel.vesa@nxp.com>,
Viorel Suman <viorel.suman@nxp.com>,
Aisheng Dong <aisheng.dong@nxp.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
dl-linux-imx <linux-imx@nxp.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] clk: imx: pll14xx: Fix quick switch of S/K parameter
Date: Mon, 09 Sep 2019 01:20:31 -0700 [thread overview]
Message-ID: <20190909082032.B704D20678@mail.kernel.org> (raw)
In-Reply-To: <VI1PR04MB70239D5AA9604E72E74CD555EEBA0@VI1PR04MB7023.eurprd04.prod.outlook.com>
Quoting Leonard Crestez (2019-09-06 12:36:47)
> On 06.09.2019 20:24, Stephen Boyd wrote:
> > Quoting Leonard Crestez (2019-09-04 02:49:18)
> >> The PLL14xx on imx8m can change the S and K parameter without requiring
> >> a reset and relock of the whole PLL.
> >>
> >> Fix clk_pll144xx_mp_change register reading and use it for pll1443 as
> >> well since no reset+relock is required on K changes either.
> >>
> >> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> >> ---
> >> drivers/clk/imx/clk-pll14xx.c | 40 +++++++----------------------------
> >> 1 file changed, 8 insertions(+), 32 deletions(-)
> >>
> >> The PLLs are currently table-based and none of the entries differ only
> >> in S/K so further work would be required to make use of this. The
> >> prospective user is audio doing tiny freq adjustments and there is no
> >> standard API for that.
> >
> > sub-Hz adjustments?
>
> Maybe at the audio level? The PLL itself runs at ~400Mhz so wouldn't
> need sub-hz adjustment.
>
> My understanding is that adjustments would be made based on an external
> clock so if CLK framework rounds to 1hz then it would just take longer
> for adjustment to kick in.
Ok.
>
> >> Lacking users is not a good reason to carry broken code around.
> >
> > Maybe add a Fixes tag so if anyone wants to use it in LTS kernels there
> > might be a chance that they'll find this patch mention code they're
> > using.
>
> It doesn't meet stable kernel rules because it doesn't "fix a real bug
> that bothers people" but it's still technically a fix:
>
> Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc")
>
Sure. Thanks! I assume Shawn will pick this up.
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Daniel Baluta <daniel.baluta@nxp.com>,
Leonard Crestez <leonard.crestez@nxp.com>,
Peng Fan <peng.fan@nxp.com>, Shawn Guo <shawnguo@kernel.org>
Cc: Aisheng Dong <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
Michael Turquette <mturquette@baylibre.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
dl-linux-imx <linux-imx@nxp.com>,
Viorel Suman <viorel.suman@nxp.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Abel Vesa <abel.vesa@nxp.com>
Subject: Re: [PATCH] clk: imx: pll14xx: Fix quick switch of S/K parameter
Date: Mon, 09 Sep 2019 01:20:31 -0700 [thread overview]
Message-ID: <20190909082032.B704D20678@mail.kernel.org> (raw)
In-Reply-To: <VI1PR04MB70239D5AA9604E72E74CD555EEBA0@VI1PR04MB7023.eurprd04.prod.outlook.com>
Quoting Leonard Crestez (2019-09-06 12:36:47)
> On 06.09.2019 20:24, Stephen Boyd wrote:
> > Quoting Leonard Crestez (2019-09-04 02:49:18)
> >> The PLL14xx on imx8m can change the S and K parameter without requiring
> >> a reset and relock of the whole PLL.
> >>
> >> Fix clk_pll144xx_mp_change register reading and use it for pll1443 as
> >> well since no reset+relock is required on K changes either.
> >>
> >> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> >> ---
> >> drivers/clk/imx/clk-pll14xx.c | 40 +++++++----------------------------
> >> 1 file changed, 8 insertions(+), 32 deletions(-)
> >>
> >> The PLLs are currently table-based and none of the entries differ only
> >> in S/K so further work would be required to make use of this. The
> >> prospective user is audio doing tiny freq adjustments and there is no
> >> standard API for that.
> >
> > sub-Hz adjustments?
>
> Maybe at the audio level? The PLL itself runs at ~400Mhz so wouldn't
> need sub-hz adjustment.
>
> My understanding is that adjustments would be made based on an external
> clock so if CLK framework rounds to 1hz then it would just take longer
> for adjustment to kick in.
Ok.
>
> >> Lacking users is not a good reason to carry broken code around.
> >
> > Maybe add a Fixes tag so if anyone wants to use it in LTS kernels there
> > might be a chance that they'll find this patch mention code they're
> > using.
>
> It doesn't meet stable kernel rules because it doesn't "fix a real bug
> that bothers people" but it's still technically a fix:
>
> Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc")
>
Sure. Thanks! I assume Shawn will pick this up.
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next prev parent reply other threads:[~2019-09-09 8:20 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-04 9:49 [PATCH] clk: imx: pll14xx: Fix quick switch of S/K parameter Leonard Crestez
2019-09-04 9:49 ` Leonard Crestez
2019-09-06 17:24 ` Stephen Boyd
2019-09-06 17:24 ` Stephen Boyd
2019-09-06 19:36 ` Leonard Crestez
2019-09-06 19:36 ` Leonard Crestez
2019-09-09 8:20 ` Stephen Boyd [this message]
2019-09-09 8:20 ` Stephen Boyd
2019-10-06 1:04 ` Shawn Guo
2019-10-06 1:04 ` Shawn Guo
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