[igt-dev] [PATCH i-g-t 2/3] Force spin-batch to cause a hang as required

[igt-dev] [PATCH i-g-t 2/3] Force spin-batch to cause a hang as required

[Chris Wilson]

When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.

References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c        | 4 +++-
 tests/i915/gem_exec_fence.c | 3 ++-
 tests/kms_busy.c            | 3 ++-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index dcbcefa97..c5831c3a4 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -176,7 +176,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
 		.engine = flags,
-		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
+		.flags = (IGT_SPIN_FAST |
+			  IGT_SPIN_NO_PREEMPTION |
+			  IGT_SPIN_FENCE_OUT),
 	};
 
 	if (gem_can_store_dword(fd, opts.engine))
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 0befb54f8..f5bdf5851 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 
 	spin = igt_spin_new(fd,
 			    .engine = ring,
-			    .flags = IGT_SPIN_FENCE_OUT);
+			    .flags = (IGT_SPIN_FENCE_OUT |
+				      IGT_SPIN_NO_PREEMPTION));
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08..7e5ab3d19 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 
 	t = igt_spin_new(dpy->drm_fd,
 			 .engine = ring,
-			 .dependency = fb.gem_handle);
+			 .dependency = fb.gem_handle,
+			 .flags = IGT_SPIN_NO_PREEMPTION);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
 
-- 
2.23.0.rc1

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[igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Chris Wilson]

On older platforms, performing a GPU reset clobbers the display.
Exercise the interactions between reset/wedge and the display and
hopefully prevent any races creeping in.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tests/i915/gem_eio.c | 79 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 9b086a039..e0213c76c 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -42,6 +42,8 @@
 
 #include "igt.h"
 #include "igt_device.h"
+#include "igt_fb.h"
+#include "igt_kms.h"
 #include "igt_stats.h"
 #include "igt_sysfs.h"
 #include "sw_sync.h"
@@ -813,6 +815,67 @@ static void test_reset_stress(int fd, unsigned int flags)
 	gem_context_destroy(fd, ctx0);
 }
 
+/*
+ * Modesetting vs wedged
+ */
+
+static void display_helper(igt_display_t *dpy, int *done)
+{
+	const int commit = dpy->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
+	struct igt_fb fb = {};
+
+	while (!READ_ONCE(*done)) {
+		drmModeModeInfoPtr mode;
+		igt_plane_t *primary;
+		igt_output_t *output;
+		int pipe;
+
+		pipe = rand() % dpy->n_pipes;
+		output = igt_get_single_output_for_pipe(dpy, pipe);
+		if (!output)
+			continue;
+
+		igt_output_set_pipe(output, pipe);
+		mode = igt_output_get_mode(output);
+
+		if (fb.width != mode->hdisplay || fb.height != mode->vdisplay) {
+			igt_remove_fb(dpy->drm_fd, &fb);
+			igt_create_pattern_fb(dpy->drm_fd,
+					      mode->hdisplay, mode->vdisplay,
+					      DRM_FORMAT_XRGB8888,
+					      LOCAL_I915_FORMAT_MOD_X_TILED,
+					      &fb);
+		}
+
+		primary = igt_output_get_plane_type(output,
+						    DRM_PLANE_TYPE_PRIMARY);
+		igt_plane_set_fb(primary, &fb);
+
+		igt_display_commit2(dpy, commit);
+		igt_display_reset(dpy);
+	}
+
+	igt_remove_fb(dpy->drm_fd, &fb);
+}
+
+static void test_kms(int i915, igt_display_t *dpy)
+{
+	int *shared;
+
+	shared = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
+	igt_assert(shared != MAP_FAILED);
+
+	igt_fork(child, 1)
+		display_helper(dpy, shared);
+
+	test_reset_stress(i915, 0);
+	test_reset_stress(i915, TEST_WEDGE);
+
+	*shared = 1;
+	igt_waitchildren();
+	munmap(shared, 4096);
+}
+
 static int fd = -1;
 
 static void
@@ -906,4 +969,20 @@ igt_main
 			}
 		}
 	}
+
+	igt_subtest_group {
+		igt_display_t display = {
+			.drm_fd = -1, .n_pipes = IGT_MAX_PIPES
+		};
+
+		igt_fixture {
+			igt_device_set_master(fd);
+
+			igt_display_require(&display, fd);
+			igt_display_require_output(&display);
+		}
+
+		igt_subtest("kms")
+			test_kms(fd, &display);
+	}
 }
-- 
2.23.0

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[PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Chris Wilson]

On older platforms, performing a GPU reset clobbers the display.
Exercise the interactions between reset/wedge and the display and
hopefully prevent any races creeping in.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tests/i915/gem_eio.c | 79 ++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 9b086a039..e0213c76c 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -42,6 +42,8 @@
 
 #include "igt.h"
 #include "igt_device.h"
+#include "igt_fb.h"
+#include "igt_kms.h"
 #include "igt_stats.h"
 #include "igt_sysfs.h"
 #include "sw_sync.h"
@@ -813,6 +815,67 @@ static void test_reset_stress(int fd, unsigned int flags)
 	gem_context_destroy(fd, ctx0);
 }
 
+/*
+ * Modesetting vs wedged
+ */
+
+static void display_helper(igt_display_t *dpy, int *done)
+{
+	const int commit = dpy->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
+	struct igt_fb fb = {};
+
+	while (!READ_ONCE(*done)) {
+		drmModeModeInfoPtr mode;
+		igt_plane_t *primary;
+		igt_output_t *output;
+		int pipe;
+
+		pipe = rand() % dpy->n_pipes;
+		output = igt_get_single_output_for_pipe(dpy, pipe);
+		if (!output)
+			continue;
+
+		igt_output_set_pipe(output, pipe);
+		mode = igt_output_get_mode(output);
+
+		if (fb.width != mode->hdisplay || fb.height != mode->vdisplay) {
+			igt_remove_fb(dpy->drm_fd, &fb);
+			igt_create_pattern_fb(dpy->drm_fd,
+					      mode->hdisplay, mode->vdisplay,
+					      DRM_FORMAT_XRGB8888,
+					      LOCAL_I915_FORMAT_MOD_X_TILED,
+					      &fb);
+		}
+
+		primary = igt_output_get_plane_type(output,
+						    DRM_PLANE_TYPE_PRIMARY);
+		igt_plane_set_fb(primary, &fb);
+
+		igt_display_commit2(dpy, commit);
+		igt_display_reset(dpy);
+	}
+
+	igt_remove_fb(dpy->drm_fd, &fb);
+}
+
+static void test_kms(int i915, igt_display_t *dpy)
+{
+	int *shared;
+
+	shared = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
+	igt_assert(shared != MAP_FAILED);
+
+	igt_fork(child, 1)
+		display_helper(dpy, shared);
+
+	test_reset_stress(i915, 0);
+	test_reset_stress(i915, TEST_WEDGE);
+
+	*shared = 1;
+	igt_waitchildren();
+	munmap(shared, 4096);
+}
+
 static int fd = -1;
 
 static void
@@ -906,4 +969,20 @@ igt_main
 			}
 		}
 	}
+
+	igt_subtest_group {
+		igt_display_t display = {
+			.drm_fd = -1, .n_pipes = IGT_MAX_PIPES
+		};
+
+		igt_fixture {
+			igt_device_set_master(fd);
+
+			igt_display_require(&display, fd);
+			igt_display_require_output(&display);
+		}
+
+		igt_subtest("kms")
+			test_kms(fd, &display);
+	}
 }
-- 
2.23.0

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[igt-dev] [PATCH i-g-t 2/3] Force spin-batch to cause a hang as required

[Chris Wilson]

When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.

References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c        | 4 +++-
 tests/i915/gem_exec_fence.c | 3 ++-
 tests/kms_busy.c            | 3 ++-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index e0213c76c..e7f5d4ddb 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -178,7 +178,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
 		.engine = flags,
-		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
+		.flags = (IGT_SPIN_FAST |
+			  IGT_SPIN_NO_PREEMPTION |
+			  IGT_SPIN_FENCE_OUT),
 	};
 
 	if (gem_can_store_dword(fd, opts.engine))
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 207182922..2f04d7af4 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 
 	spin = igt_spin_new(fd,
 			    .engine = ring,
-			    .flags = IGT_SPIN_FENCE_OUT);
+			    .flags = (IGT_SPIN_FENCE_OUT |
+				      IGT_SPIN_NO_PREEMPTION));
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08..7e5ab3d19 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 
 	t = igt_spin_new(dpy->drm_fd,
 			 .engine = ring,
-			 .dependency = fb.gem_handle);
+			 .dependency = fb.gem_handle,
+			 .flags = IGT_SPIN_NO_PREEMPTION);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
 
-- 
2.23.0

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[PATCH i-g-t 2/3] Force spin-batch to cause a hang as required

[Chris Wilson]

When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.

References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c        | 4 +++-
 tests/i915/gem_exec_fence.c | 3 ++-
 tests/kms_busy.c            | 3 ++-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index e0213c76c..e7f5d4ddb 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -178,7 +178,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
 		.engine = flags,
-		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
+		.flags = (IGT_SPIN_FAST |
+			  IGT_SPIN_NO_PREEMPTION |
+			  IGT_SPIN_FENCE_OUT),
 	};
 
 	if (gem_can_store_dword(fd, opts.engine))
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 207182922..2f04d7af4 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 
 	spin = igt_spin_new(fd,
 			    .engine = ring,
-			    .flags = IGT_SPIN_FENCE_OUT);
+			    .flags = (IGT_SPIN_FENCE_OUT |
+				      IGT_SPIN_NO_PREEMPTION));
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08..7e5ab3d19 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 
 	t = igt_spin_new(dpy->drm_fd,
 			 .engine = ring,
-			 .dependency = fb.gem_handle);
+			 .dependency = fb.gem_handle,
+			 .flags = IGT_SPIN_NO_PREEMPTION);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
 
-- 
2.23.0

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[igt-dev] [PATCH i-g-t 3/3] kms_busy: Replace fiddling with hangcheck modparam with explicit fence

[Chris Wilson]

Use an explicit fence to circumvent the [i915] GPU hang detection rather
than tweak the i915 specific modparam (and remove the assertion that
such a param exists). Note, that with a bit more work, the fence could
be used be directly rather than via dirtying the fb with a dummyload.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_dummyload.c |  5 +++++
 lib/igt_dummyload.h | 10 ++++++----
 tests/kms_busy.c    | 26 ++++++++++----------------
 3 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 0e06276af..65b5cc927 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -236,6 +236,11 @@ emit_recursive_batch(igt_spin_t *spin,
 	if (opts->flags & IGT_SPIN_FENCE_OUT)
 		execbuf->flags |= I915_EXEC_FENCE_OUT;
 
+	if (opts->flags & IGT_SPIN_FENCE_IN) {
+		execbuf->flags |= I915_EXEC_FENCE_IN;
+		execbuf->rsvd2 = opts->fence;
+	}
+
 	for (i = 0; i < nengine; i++) {
 		execbuf->flags &= ~ENGINE_MASK;
 		execbuf->flags |= flags[i];
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index bb25751ad..66837057d 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -54,12 +54,14 @@ struct igt_spin_factory {
 	uint32_t dependency;
 	unsigned int engine;
 	unsigned int flags;
+	int fence;
 };
 
-#define IGT_SPIN_FENCE_OUT     (1 << 0)
-#define IGT_SPIN_POLL_RUN      (1 << 1)
-#define IGT_SPIN_FAST          (1 << 2)
-#define IGT_SPIN_NO_PREEMPTION (1 << 3)
+#define IGT_SPIN_FENCE_IN      (1 << 0)
+#define IGT_SPIN_FENCE_OUT     (1 << 1)
+#define IGT_SPIN_POLL_RUN      (1 << 2)
+#define IGT_SPIN_FAST          (1 << 3)
+#define IGT_SPIN_NO_PREEMPTION (1 << 4)
 
 igt_spin_t *
 __igt_spin_factory(int fd, const struct igt_spin_factory *opts);
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 7e5ab3d19..bfb3857f4 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -75,22 +75,16 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN };
 	const int timeout = modeset ? 8500 : 100;
 	struct drm_event_vblank ev;
+	IGT_CORK_FENCE(cork);
+	igt_spin_t *t;
+	int fence;
 
-	igt_spin_t *t = igt_spin_new(dpy->drm_fd,
-				     .engine = ring,
-				     .dependency = fb->gem_handle);
-
-	if (modeset) {
-		/*
-		 * We want to check that a modeset actually waits for the
-		 * spin batch to complete, but we keep a bigger timeout for
-		 * disable than required for flipping.
-		 *
-		 * As a result, the GPU reset code may kick in, which we neuter
-		 * here to be sure there's no premature completion.
-		 */
-		igt_set_module_param_int("enable_hangcheck", 0);
-	}
+	fence = igt_cork_plug(&cork, dpy->drm_fd);
+	t = igt_spin_new(dpy->drm_fd,
+			 .engine = ring,
+			 .fence = fence,
+			 .dependency = fb->gem_handle,
+			 .flags = IGT_SPIN_FENCE_IN | IGT_SPIN_NO_PREEMPTION);
 
 	igt_fork(child, 1) {
 		igt_assert(gem_bo_busy(dpy->drm_fd, fb->gem_handle));
@@ -116,13 +110,13 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	igt_waitchildren_timeout(5 * timeout,
 				 "flip blocked waiting for busy bo\n");
 	igt_spin_end(t);
+	close(fence);
 
 	igt_assert(read(dpy->drm_fd, &ev, sizeof(ev)) == sizeof(ev));
 	igt_assert(poll(&pfd, 1, 0) == 0);
 
 	if (modeset) {
 		gem_quiescent_gpu(dpy->drm_fd);
-		igt_set_module_param_int("enable_hangcheck", 1);
 
 		/* Clear old mode blob. */
 		igt_pipe_refresh(dpy, pipe, true);
-- 
2.23.0

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[PATCH i-g-t 3/3] kms_busy: Replace fiddling with hangcheck modparam with explicit fence

[Chris Wilson]

Use an explicit fence to circumvent the [i915] GPU hang detection rather
than tweak the i915 specific modparam (and remove the assertion that
such a param exists). Note, that with a bit more work, the fence could
be used be directly rather than via dirtying the fb with a dummyload.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_dummyload.c |  5 +++++
 lib/igt_dummyload.h | 10 ++++++----
 tests/kms_busy.c    | 26 ++++++++++----------------
 3 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 0e06276af..65b5cc927 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -236,6 +236,11 @@ emit_recursive_batch(igt_spin_t *spin,
 	if (opts->flags & IGT_SPIN_FENCE_OUT)
 		execbuf->flags |= I915_EXEC_FENCE_OUT;
 
+	if (opts->flags & IGT_SPIN_FENCE_IN) {
+		execbuf->flags |= I915_EXEC_FENCE_IN;
+		execbuf->rsvd2 = opts->fence;
+	}
+
 	for (i = 0; i < nengine; i++) {
 		execbuf->flags &= ~ENGINE_MASK;
 		execbuf->flags |= flags[i];
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index bb25751ad..66837057d 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -54,12 +54,14 @@ struct igt_spin_factory {
 	uint32_t dependency;
 	unsigned int engine;
 	unsigned int flags;
+	int fence;
 };
 
-#define IGT_SPIN_FENCE_OUT     (1 << 0)
-#define IGT_SPIN_POLL_RUN      (1 << 1)
-#define IGT_SPIN_FAST          (1 << 2)
-#define IGT_SPIN_NO_PREEMPTION (1 << 3)
+#define IGT_SPIN_FENCE_IN      (1 << 0)
+#define IGT_SPIN_FENCE_OUT     (1 << 1)
+#define IGT_SPIN_POLL_RUN      (1 << 2)
+#define IGT_SPIN_FAST          (1 << 3)
+#define IGT_SPIN_NO_PREEMPTION (1 << 4)
 
 igt_spin_t *
 __igt_spin_factory(int fd, const struct igt_spin_factory *opts);
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 7e5ab3d19..bfb3857f4 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -75,22 +75,16 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN };
 	const int timeout = modeset ? 8500 : 100;
 	struct drm_event_vblank ev;
+	IGT_CORK_FENCE(cork);
+	igt_spin_t *t;
+	int fence;
 
-	igt_spin_t *t = igt_spin_new(dpy->drm_fd,
-				     .engine = ring,
-				     .dependency = fb->gem_handle);
-
-	if (modeset) {
-		/*
-		 * We want to check that a modeset actually waits for the
-		 * spin batch to complete, but we keep a bigger timeout for
-		 * disable than required for flipping.
-		 *
-		 * As a result, the GPU reset code may kick in, which we neuter
-		 * here to be sure there's no premature completion.
-		 */
-		igt_set_module_param_int("enable_hangcheck", 0);
-	}
+	fence = igt_cork_plug(&cork, dpy->drm_fd);
+	t = igt_spin_new(dpy->drm_fd,
+			 .engine = ring,
+			 .fence = fence,
+			 .dependency = fb->gem_handle,
+			 .flags = IGT_SPIN_FENCE_IN | IGT_SPIN_NO_PREEMPTION);
 
 	igt_fork(child, 1) {
 		igt_assert(gem_bo_busy(dpy->drm_fd, fb->gem_handle));
@@ -116,13 +110,13 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	igt_waitchildren_timeout(5 * timeout,
 				 "flip blocked waiting for busy bo\n");
 	igt_spin_end(t);
+	close(fence);
 
 	igt_assert(read(dpy->drm_fd, &ev, sizeof(ev)) == sizeof(ev));
 	igt_assert(poll(&pfd, 1, 0) == 0);
 
 	if (modeset) {
 		gem_quiescent_gpu(dpy->drm_fd);
-		igt_set_module_param_int("enable_hangcheck", 1);
 
 		/* Clear old mode blob. */
 		igt_pipe_refresh(dpy, pipe, true);
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/3] i915/gem_eio: Race kms on/off vs reset

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/3] i915/gem_eio: Race kms on/off vs reset
URL   : https://patchwork.freedesktop.org/series/66522/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6868 -> IGTPW_3440
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/66522/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3440 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_execlists:
    - fi-skl-gvtdvm:      [PASS][1] -> [DMESG-FAIL][2] ([fdo#111108])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_sanitycheck:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [PASS][5] -> [FAIL][6] ([fdo#109483] / [fdo#109635 ])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  
#### Possible fixes ####

  * igt@prime_vgem@basic-gtt:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/fi-icl-u3/igt@prime_vgem@basic-gtt.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/fi-icl-u3/igt@prime_vgem@basic-gtt.html

  
#### Warnings ####

  * igt@i915_pm_rpm@module-reload:
    - fi-icl-u2:          [INCOMPLETE][9] ([fdo#107713] / [fdo#108840]) -> [DMESG-WARN][10] ([fdo#110595])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/fi-icl-u2/igt@i915_pm_rpm@module-reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/fi-icl-u2/igt@i915_pm_rpm@module-reload.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
  [fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 
  [fdo#110595]: https://bugs.freedesktop.org/show_bug.cgi?id=110595
  [fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108


Participating hosts (53 -> 44)
------------------------------

  Missing    (9): fi-ilk-m540 fi-bdw-5557u fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5178 -> IGTPW_3440

  CI-20190529: 20190529
  CI_DRM_6868: fb9bbe42526c1a8467c99f8137ed6b94c749681f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3440: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/
  IGT_5178: efb4539494d94f03374874d3b61bd04ef3802aaa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@gem_eio@kms

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/3] i915/gem_eio: Race kms on/off vs reset

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/3] i915/gem_eio: Race kms on/off vs reset
URL   : https://patchwork.freedesktop.org/series/66522/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6868_full -> IGTPW_3440_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3440_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3440_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/66522/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3440_full:

### IGT changes ###

#### Possible regressions ####

  * {igt@gem_eio@kms} (NEW):
    - shard-snb:          NOTRUN -> [DMESG-WARN][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-snb5/igt@gem_eio@kms.html

  * igt@runner@aborted:
    - shard-snb:          NOTRUN -> [FAIL][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-snb5/igt@runner@aborted.html

  
New tests
---------

  New tests have been introduced between CI_DRM_6868_full and IGTPW_3440_full:

### New IGT tests (1) ###

  * igt@gem_eio@kms:
    - Statuses : 1 dmesg-warn(s) 5 pass(s)
    - Exec time: [58.32, 77.61] s

  

Known issues
------------

  Here are the changes found in IGTPW_3440_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vecs0-s3:
    - shard-apl:          [PASS][3] -> [INCOMPLETE][4] ([fdo#103927]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-apl1/igt@gem_ctx_isolation@vecs0-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-apl1/igt@gem_ctx_isolation@vecs0-s3.html

  * igt@gem_ctx_shared@q-in-order-bsd2:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276]) +14 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb1/igt@gem_ctx_shared@q-in-order-bsd2.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb8/igt@gem_ctx_shared@q-in-order-bsd2.html

  * igt@gem_eio@in-flight-suspend:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +4 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-apl4/igt@gem_eio@in-flight-suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-apl3/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#111325]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb3/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_workarounds@suspend-resume:
    - shard-iclb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#107713])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb5/igt@gem_workarounds@suspend-resume.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb3/igt@gem_workarounds@suspend-resume.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([fdo#103167]) +2 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][15] -> [FAIL][16] ([fdo#108341])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb3/igt@kms_psr@no_drrs.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][17] -> [SKIP][18] ([fdo#109441]) +3 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb3/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_rotation_crc@sprite-rotation-180:
    - shard-snb:          [PASS][19] -> [SKIP][20] ([fdo#109271]) +2 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-snb7/igt@kms_rotation_crc@sprite-rotation-180.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-snb6/igt@kms_rotation_crc@sprite-rotation-180.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][21] -> [FAIL][22] ([fdo#99912])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-kbl7/igt@kms_setmode@basic.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-kbl3/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_eio@reset-stress:
    - shard-apl:          [FAIL][23] ([fdo#109661]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-apl2/igt@gem_eio@reset-stress.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-apl3/igt@gem_eio@reset-stress.html

  * igt@gem_exec_schedule@deep-bsd:
    - shard-iclb:         [SKIP][25] ([fdo#111325]) -> [PASS][26] +6 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb2/igt@gem_exec_schedule@deep-bsd.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb6/igt@gem_exec_schedule@deep-bsd.html

  * igt@gem_exec_schedule@independent-bsd1:
    - shard-iclb:         [SKIP][27] ([fdo#109276]) -> [PASS][28] +24 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb8/igt@gem_exec_schedule@independent-bsd1.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb1/igt@gem_exec_schedule@independent-bsd1.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-apl:          [DMESG-WARN][29] ([fdo#108566]) -> [PASS][30] +2 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-apl5/igt@i915_suspend@fence-restore-untiled.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-apl5/igt@i915_suspend@fence-restore-untiled.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][31] ([fdo#105363]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-iclb:         [FAIL][33] ([fdo#103167]) -> [PASS][34] +4 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         [SKIP][35] ([fdo#109441]) -> [PASS][36] +2 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb7/igt@kms_psr@psr2_cursor_plane_onoff.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][37] ([fdo#99912]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-apl8/igt@kms_setmode@basic.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-apl6/igt@kms_setmode@basic.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][39] ([fdo#111329]) -> [SKIP][40] ([fdo#109276])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-rc6-bsd2:
    - shard-iclb:         [SKIP][41] ([fdo#109276]) -> [FAIL][42] ([fdo#111330])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6868/shard-iclb5/igt@gem_mocs_settings@mocs-rc6-bsd2.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/shard-iclb4/igt@gem_mocs_settings@mocs-rc6-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 6)
------------------------------

  Missing    (4): pig-skl-6260u shard-skl pig-hsw-4770r pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5178 -> IGTPW_3440
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_6868: fb9bbe42526c1a8467c99f8137ed6b94c749681f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3440: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/
  IGT_5178: efb4539494d94f03374874d3b61bd04ef3802aaa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3440/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Andi Shyti]

Hi Chris,

On Wed, Sep 11, 2019 at 11:14:59AM +0100, Chris Wilson wrote:
> On older platforms, performing a GPU reset clobbers the display.
> Exercise the interactions between reset/wedge and the display and
> hopefully prevent any races creeping in.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

Is Ville Cc'ed for real or just nominally?

looks straight forward,

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Andi Shyti]

Hi Chris,

On Wed, Sep 11, 2019 at 11:14:59AM +0100, Chris Wilson wrote:
> On older platforms, performing a GPU reset clobbers the display.
> Exercise the interactions between reset/wedge and the display and
> hopefully prevent any races creeping in.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>

Is Ville Cc'ed for real or just nominally?

looks straight forward,

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [igt-dev] [PATCH i-g-t 2/3] Force spin-batch to cause a hang as required

[Andi Shyti]

On Wed, Sep 11, 2019 at 11:15:00AM +0100, Chris Wilson wrote:
> When using a spinner to trigger a hang, make it unpreemptable so that it
> appears like a true hang.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi

> ---
>  tests/i915/gem_eio.c        | 4 +++-
>  tests/i915/gem_exec_fence.c | 3 ++-
>  tests/kms_busy.c            | 3 ++-
>  3 files changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index e0213c76c..e7f5d4ddb 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -178,7 +178,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
>  	struct igt_spin_factory opts = {
>  		.ctx = ctx,
>  		.engine = flags,
> -		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
> +		.flags = (IGT_SPIN_FAST |
> +			  IGT_SPIN_NO_PREEMPTION |
> +			  IGT_SPIN_FENCE_OUT),
>  	};
>  
>  	if (gem_can_store_dword(fd, opts.engine))
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index 207182922..2f04d7af4 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
>  
>  	spin = igt_spin_new(fd,
>  			    .engine = ring,
> -			    .flags = IGT_SPIN_FENCE_OUT);
> +			    .flags = (IGT_SPIN_FENCE_OUT |
> +				      IGT_SPIN_NO_PREEMPTION));
>  	igt_assert(spin->out_fence != -1);
>  
>  	i = 0;
> diff --git a/tests/kms_busy.c b/tests/kms_busy.c
> index 66f26cd08..7e5ab3d19 100644
> --- a/tests/kms_busy.c
> +++ b/tests/kms_busy.c
> @@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
>  
>  	t = igt_spin_new(dpy->drm_fd,
>  			 .engine = ring,
> -			 .dependency = fb.gem_handle);
> +			 .dependency = fb.gem_handle,
> +			 .flags = IGT_SPIN_NO_PREEMPTION);
>  
>  	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
>  
> -- 
> 2.23.0
> 
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t 2/3] Force spin-batch to cause a hang as required

[Andi Shyti]

On Wed, Sep 11, 2019 at 11:15:00AM +0100, Chris Wilson wrote:
> When using a spinner to trigger a hang, make it unpreemptable so that it
> appears like a true hang.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi

> ---
>  tests/i915/gem_eio.c        | 4 +++-
>  tests/i915/gem_exec_fence.c | 3 ++-
>  tests/kms_busy.c            | 3 ++-
>  3 files changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index e0213c76c..e7f5d4ddb 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -178,7 +178,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
>  	struct igt_spin_factory opts = {
>  		.ctx = ctx,
>  		.engine = flags,
> -		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
> +		.flags = (IGT_SPIN_FAST |
> +			  IGT_SPIN_NO_PREEMPTION |
> +			  IGT_SPIN_FENCE_OUT),
>  	};
>  
>  	if (gem_can_store_dword(fd, opts.engine))
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index 207182922..2f04d7af4 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
>  
>  	spin = igt_spin_new(fd,
>  			    .engine = ring,
> -			    .flags = IGT_SPIN_FENCE_OUT);
> +			    .flags = (IGT_SPIN_FENCE_OUT |
> +				      IGT_SPIN_NO_PREEMPTION));
>  	igt_assert(spin->out_fence != -1);
>  
>  	i = 0;
> diff --git a/tests/kms_busy.c b/tests/kms_busy.c
> index 66f26cd08..7e5ab3d19 100644
> --- a/tests/kms_busy.c
> +++ b/tests/kms_busy.c
> @@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
>  
>  	t = igt_spin_new(dpy->drm_fd,
>  			 .engine = ring,
> -			 .dependency = fb.gem_handle);
> +			 .dependency = fb.gem_handle,
> +			 .flags = IGT_SPIN_NO_PREEMPTION);
>  
>  	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
>  
> -- 
> 2.23.0
> 
> _______________________________________________
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> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
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Re: [igt-dev] [PATCH i-g-t 3/3] kms_busy: Replace fiddling with hangcheck modparam with explicit fence

[Andi Shyti]

Hi Chris,

On Wed, Sep 11, 2019 at 11:15:01AM +0100, Chris Wilson wrote:
> Use an explicit fence to circumvent the [i915] GPU hang detection rather
> than tweak the i915 specific modparam (and remove the assertion that
> such a param exists). Note, that with a bit more work, the fence could
> be used be directly rather than via dirtying the fb with a dummyload.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

looks OK,

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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Re: [igt-dev] [PATCH i-g-t 3/3] kms_busy: Replace fiddling with hangcheck modparam with explicit fence

[Andi Shyti]

Hi Chris,

On Wed, Sep 11, 2019 at 11:15:01AM +0100, Chris Wilson wrote:
> Use an explicit fence to circumvent the [i915] GPU hang detection rather
> than tweak the i915 specific modparam (and remove the assertion that
> such a param exists). Note, that with a bit more work, the fence could
> be used be directly rather than via dirtying the fb with a dummyload.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

looks OK,

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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Re: [igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Chris Wilson]

Quoting Andi Shyti (2019-09-19 15:08:57)
> Hi Chris,
> 
> On Wed, Sep 11, 2019 at 11:14:59AM +0100, Chris Wilson wrote:
> > On older platforms, performing a GPU reset clobbers the display.
> > Exercise the interactions between reset/wedge and the display and
> > hopefully prevent any races creeping in.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Is Ville Cc'ed for real or just nominally?

He's in the original cc. As it is using "Syrjälä", that means I copied
his email address from one of his commits, so it should be the right
address.

mailman naturally drops cc of list members...
-Chris
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Re: [igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Chris Wilson]

Quoting Andi Shyti (2019-09-19 15:08:57)
> Hi Chris,
> 
> On Wed, Sep 11, 2019 at 11:14:59AM +0100, Chris Wilson wrote:
> > On older platforms, performing a GPU reset clobbers the display.
> > Exercise the interactions between reset/wedge and the display and
> > hopefully prevent any races creeping in.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Is Ville Cc'ed for real or just nominally?

He's in the original cc. As it is using "Syrjälä", that means I copied
his email address from one of his commits, so it should be the right
address.

mailman naturally drops cc of list members...
-Chris
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Re: [igt-dev] [PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Ville Syrjälä]

On Wed, Sep 11, 2019 at 11:14:59AM +0100, Chris Wilson wrote:
> On older platforms, performing a GPU reset clobbers the display.
> Exercise the interactions between reset/wedge and the display and
> hopefully prevent any races creeping in.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  tests/i915/gem_eio.c | 79 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 79 insertions(+)
> 
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index 9b086a039..e0213c76c 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -42,6 +42,8 @@
>  
>  #include "igt.h"
>  #include "igt_device.h"
> +#include "igt_fb.h"
> +#include "igt_kms.h"
>  #include "igt_stats.h"
>  #include "igt_sysfs.h"
>  #include "sw_sync.h"
> @@ -813,6 +815,67 @@ static void test_reset_stress(int fd, unsigned int flags)
>  	gem_context_destroy(fd, ctx0);
>  }
>  
> +/*
> + * Modesetting vs wedged
> + */
> +
> +static void display_helper(igt_display_t *dpy, int *done)
> +{
> +	const int commit = dpy->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
> +	struct igt_fb fb = {};
> +
> +	while (!READ_ONCE(*done)) {
> +		drmModeModeInfoPtr mode;
> +		igt_plane_t *primary;
> +		igt_output_t *output;
> +		int pipe;
> +
> +		pipe = rand() % dpy->n_pipes;

I guess this ends up doing nothing if we get the same pipe twice in a
row? Hmm, I guess it does actually do something but since nothing
significant would change the kernel likely just downgrades it to a
fastset. But maybe that's fine.

There are some reset vs. modeset type of tests in kms_flip, but those
are rather more carefully sequenced so they are probably not so great
at finding new races.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +		output = igt_get_single_output_for_pipe(dpy, pipe);
> +		if (!output)
> +			continue;
> +
> +		igt_output_set_pipe(output, pipe);
> +		mode = igt_output_get_mode(output);
> +
> +		if (fb.width != mode->hdisplay || fb.height != mode->vdisplay) {
> +			igt_remove_fb(dpy->drm_fd, &fb);
> +			igt_create_pattern_fb(dpy->drm_fd,
> +					      mode->hdisplay, mode->vdisplay,
> +					      DRM_FORMAT_XRGB8888,
> +					      LOCAL_I915_FORMAT_MOD_X_TILED,
> +					      &fb);
> +		}
> +
> +		primary = igt_output_get_plane_type(output,
> +						    DRM_PLANE_TYPE_PRIMARY);
> +		igt_plane_set_fb(primary, &fb);
> +
> +		igt_display_commit2(dpy, commit);
> +		igt_display_reset(dpy);
> +	}
> +
> +	igt_remove_fb(dpy->drm_fd, &fb);
> +}
> +
> +static void test_kms(int i915, igt_display_t *dpy)
> +{
> +	int *shared;
> +
> +	shared = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
> +	igt_assert(shared != MAP_FAILED);
> +
> +	igt_fork(child, 1)
> +		display_helper(dpy, shared);
> +
> +	test_reset_stress(i915, 0);
> +	test_reset_stress(i915, TEST_WEDGE);
> +
> +	*shared = 1;
> +	igt_waitchildren();
> +	munmap(shared, 4096);
> +}
> +
>  static int fd = -1;
>  
>  static void
> @@ -906,4 +969,20 @@ igt_main
>  			}
>  		}
>  	}
> +
> +	igt_subtest_group {
> +		igt_display_t display = {
> +			.drm_fd = -1, .n_pipes = IGT_MAX_PIPES
> +		};
> +
> +		igt_fixture {
> +			igt_device_set_master(fd);
> +
> +			igt_display_require(&display, fd);
> +			igt_display_require_output(&display);
> +		}
> +
> +		igt_subtest("kms")
> +			test_kms(fd, &display);
> +	}
>  }
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel
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Re: [PATCH i-g-t 1/3] i915/gem_eio: Race kms on/off vs reset

[Ville Syrjälä]

On Wed, Sep 11, 2019 at 11:14:59AM +0100, Chris Wilson wrote:
> On older platforms, performing a GPU reset clobbers the display.
> Exercise the interactions between reset/wedge and the display and
> hopefully prevent any races creeping in.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  tests/i915/gem_eio.c | 79 ++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 79 insertions(+)
> 
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index 9b086a039..e0213c76c 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -42,6 +42,8 @@
>  
>  #include "igt.h"
>  #include "igt_device.h"
> +#include "igt_fb.h"
> +#include "igt_kms.h"
>  #include "igt_stats.h"
>  #include "igt_sysfs.h"
>  #include "sw_sync.h"
> @@ -813,6 +815,67 @@ static void test_reset_stress(int fd, unsigned int flags)
>  	gem_context_destroy(fd, ctx0);
>  }
>  
> +/*
> + * Modesetting vs wedged
> + */
> +
> +static void display_helper(igt_display_t *dpy, int *done)
> +{
> +	const int commit = dpy->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
> +	struct igt_fb fb = {};
> +
> +	while (!READ_ONCE(*done)) {
> +		drmModeModeInfoPtr mode;
> +		igt_plane_t *primary;
> +		igt_output_t *output;
> +		int pipe;
> +
> +		pipe = rand() % dpy->n_pipes;

I guess this ends up doing nothing if we get the same pipe twice in a
row? Hmm, I guess it does actually do something but since nothing
significant would change the kernel likely just downgrades it to a
fastset. But maybe that's fine.

There are some reset vs. modeset type of tests in kms_flip, but those
are rather more carefully sequenced so they are probably not so great
at finding new races.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +		output = igt_get_single_output_for_pipe(dpy, pipe);
> +		if (!output)
> +			continue;
> +
> +		igt_output_set_pipe(output, pipe);
> +		mode = igt_output_get_mode(output);
> +
> +		if (fb.width != mode->hdisplay || fb.height != mode->vdisplay) {
> +			igt_remove_fb(dpy->drm_fd, &fb);
> +			igt_create_pattern_fb(dpy->drm_fd,
> +					      mode->hdisplay, mode->vdisplay,
> +					      DRM_FORMAT_XRGB8888,
> +					      LOCAL_I915_FORMAT_MOD_X_TILED,
> +					      &fb);
> +		}
> +
> +		primary = igt_output_get_plane_type(output,
> +						    DRM_PLANE_TYPE_PRIMARY);
> +		igt_plane_set_fb(primary, &fb);
> +
> +		igt_display_commit2(dpy, commit);
> +		igt_display_reset(dpy);
> +	}
> +
> +	igt_remove_fb(dpy->drm_fd, &fb);
> +}
> +
> +static void test_kms(int i915, igt_display_t *dpy)
> +{
> +	int *shared;
> +
> +	shared = mmap(NULL, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
> +	igt_assert(shared != MAP_FAILED);
> +
> +	igt_fork(child, 1)
> +		display_helper(dpy, shared);
> +
> +	test_reset_stress(i915, 0);
> +	test_reset_stress(i915, TEST_WEDGE);
> +
> +	*shared = 1;
> +	igt_waitchildren();
> +	munmap(shared, 4096);
> +}
> +
>  static int fd = -1;
>  
>  static void
> @@ -906,4 +969,20 @@ igt_main
>  			}
>  		}
>  	}
> +
> +	igt_subtest_group {
> +		igt_display_t display = {
> +			.drm_fd = -1, .n_pipes = IGT_MAX_PIPES
> +		};
> +
> +		igt_fixture {
> +			igt_device_set_master(fd);
> +
> +			igt_display_require(&display, fd);
> +			igt_display_require_output(&display);
> +		}
> +
> +		igt_subtest("kms")
> +			test_kms(fd, &display);
> +	}
>  }
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel
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