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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Kukjin Kim <kgene@kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org
Cc: Marek Szyprowski <m.szyprowski@samsung.com>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
	Sylwester Nawrocki <snawrocki@kernel.org>
Subject: [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier
Date: Sat, 21 Sep 2019 19:01:52 +0200	[thread overview]
Message-ID: <20190921170152.5033-8-krzk@kernel.org> (raw)
In-Reply-To: <20190921170152.5033-1-krzk@kernel.org>

Replace hard-coded number with appropriate define for GIC SPI or PPI
specifier in interrupt.  This makes code easier to read.  No expected
functionality change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos4210.dtsi |  8 ++++----
 arch/arm/boot/dts/exynos4412.dtsi |  4 ++--
 arch/arm/boot/dts/exynos5250.dtsi |  4 ++--
 arch/arm/boot/dts/exynos54xx.dtsi | 16 ++++++++--------
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 38c49ab8c733..650bee6355e4 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -116,12 +116,12 @@
 			#interrupt-cells = <1>;
 			interrupt-parent = <&mct>;
 			interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
-			interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
-					<1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
+			interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+					<1 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 					<2 &combiner 12 6>,
 					<3 &combiner 12 7>,
-					<4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
-					<5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+					<5 &gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 7e2dabefd53f..0810c14bf424 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -253,11 +253,11 @@
 			#interrupt-cells = <1>;
 			interrupt-parent = <&mct>;
 			interrupts = <0>, <1>, <2>, <3>, <4>;
-			interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+			interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 					<1 &combiner 12 5>,
 					<2 &combiner 12 6>,
 					<3 &combiner 12 7>,
-					<4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index e0fcf3c2f537..61f22feefda9 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -247,8 +247,8 @@
 					<1 &combiner 23 4>,
 					<2 &combiner 25 2>,
 					<3 &combiner 25 3>,
-					<4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
-					<5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+					<5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		pinctrl_0: pinctrl@11400000 {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index a1c10a9a86f8..f52c7ce5d320 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -77,14 +77,14 @@
 					<1 &combiner 23 4>,
 					<2 &combiner 25 2>,
 					<3 &combiner 25 3>,
-					<4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
-					<5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
-					<6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
-					<7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
-					<8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
-					<9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
-					<10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
-					<11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+					<5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+					<6 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+					<7 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+					<8 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+					<9 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+					<10 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+					<11 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		watchdog: watchdog@101d0000 {
-- 
2.17.1

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Kukjin Kim <kgene@kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org
Cc: Sylwester Nawrocki <snawrocki@kernel.org>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
	Marek Szyprowski <m.szyprowski@samsung.com>
Subject: [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier
Date: Sat, 21 Sep 2019 19:01:52 +0200	[thread overview]
Message-ID: <20190921170152.5033-8-krzk@kernel.org> (raw)
In-Reply-To: <20190921170152.5033-1-krzk@kernel.org>

Replace hard-coded number with appropriate define for GIC SPI or PPI
specifier in interrupt.  This makes code easier to read.  No expected
functionality change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
 arch/arm/boot/dts/exynos4210.dtsi |  8 ++++----
 arch/arm/boot/dts/exynos4412.dtsi |  4 ++--
 arch/arm/boot/dts/exynos5250.dtsi |  4 ++--
 arch/arm/boot/dts/exynos54xx.dtsi | 16 ++++++++--------
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 38c49ab8c733..650bee6355e4 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -116,12 +116,12 @@
 			#interrupt-cells = <1>;
 			interrupt-parent = <&mct>;
 			interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
-			interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
-					<1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
+			interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+					<1 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 					<2 &combiner 12 6>,
 					<3 &combiner 12 7>,
-					<4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
-					<5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+					<5 &gic GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 7e2dabefd53f..0810c14bf424 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -253,11 +253,11 @@
 			#interrupt-cells = <1>;
 			interrupt-parent = <&mct>;
 			interrupts = <0>, <1>, <2>, <3>, <4>;
-			interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+			interrupt-map = <0 &gic GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 					<1 &combiner 12 5>,
 					<2 &combiner 12 6>,
 					<3 &combiner 12 7>,
-					<4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		watchdog: watchdog@10060000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index e0fcf3c2f537..61f22feefda9 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -247,8 +247,8 @@
 					<1 &combiner 23 4>,
 					<2 &combiner 25 2>,
 					<3 &combiner 25 3>,
-					<4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
-					<5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+					<5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		pinctrl_0: pinctrl@11400000 {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index a1c10a9a86f8..f52c7ce5d320 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -77,14 +77,14 @@
 					<1 &combiner 23 4>,
 					<2 &combiner 25 2>,
 					<3 &combiner 25 3>,
-					<4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
-					<5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
-					<6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
-					<7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
-					<8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
-					<9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
-					<10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
-					<11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
+					<4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+					<5 &gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+					<6 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+					<7 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+					<8 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+					<9 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+					<10 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+					<11 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		watchdog: watchdog@101d0000 {
-- 
2.17.1


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  parent reply	other threads:[~2019-09-21 17:01 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-21 17:01 [PATCH v3 1/8] dt-bindings: timer: Convert Exynos MCT bindings to json-schema Krzysztof Kozlowski
2019-09-21 17:01 ` Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 2/8] ARM: dts: exynos: Rename Multi Core Timer node to "timer" Krzysztof Kozlowski
2019-09-21 17:01   ` Krzysztof Kozlowski
2019-09-21 17:01 ` [PATCH v3 3/8] arm64: " Krzysztof Kozlowski
2019-09-21 17:01   ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 4/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4210 Krzysztof Kozlowski
2019-09-21 17:01   ` Krzysztof Kozlowski
2019-09-23  6:56   ` Marek Szyprowski
2019-09-23  6:56     ` Marek Szyprowski
2019-09-23  7:13     ` Krzysztof Kozlowski
2019-09-23  7:13       ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 5/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412 Krzysztof Kozlowski
2019-09-21 17:01   ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 6/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250 Krzysztof Kozlowski
2019-09-21 17:01   ` Krzysztof Kozlowski
2019-09-21 17:01 ` [RFT v3 7/8] ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx Krzysztof Kozlowski
2019-09-21 17:01   ` Krzysztof Kozlowski
2019-09-21 17:01 ` Krzysztof Kozlowski [this message]
2019-09-21 17:01   ` [PATCH v3 8/8] ARM: dts: exynos: Use defines for MCT interrupt GIC SPI/PPI specifier Krzysztof Kozlowski

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