From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Marc Orr <marcorr@google.com>
Cc: kvm@vger.kernel.org, jmattson@google.com, pshier@google.com,
krish.sadhukhan@oracle.com, pbonzini@redhat.com,
rkrcmar@redhat.com, dinechin@redhat.com
Subject: Re: [kvm-unit-tests PATCH v7 2/2] x86: nvmx: test max atomic switch MSRs
Date: Wed, 25 Sep 2019 12:13:38 -0700 [thread overview]
Message-ID: <20190925191338.GL31852@linux.intel.com> (raw)
In-Reply-To: <20190925011821.24523-2-marcorr@google.com>
On Tue, Sep 24, 2019 at 06:18:21PM -0700, Marc Orr wrote:
> Excercise nested VMX's atomic MSR switch code (e.g., VM-entry MSR-load
> list) at the maximum number of MSRs supported, as described in the SDM,
> in the appendix chapter titled "MISCELLANEOUS DATA".
>
> Suggested-by: Jim Mattson <jmattson@google.com>
> Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
> Signed-off-by: Marc Orr <marcorr@google.com>
> ---
Thanks for being patient and fixing all the nits!
Reviewed-by: Sean Christopherson <sean.j.christopherson@intel.com>
next prev parent reply other threads:[~2019-09-25 19:13 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 1:18 [kvm-unit-tests PATCH v7 1/2] x86: nvmx: fix bug in __enter_guest() Marc Orr
2019-09-25 1:18 ` [kvm-unit-tests PATCH v7 2/2] x86: nvmx: test max atomic switch MSRs Marc Orr
2019-09-25 19:13 ` Sean Christopherson [this message]
2019-09-26 9:24 ` Paolo Bonzini
2019-09-26 14:32 ` Sean Christopherson
2019-09-26 14:35 ` Liran Alon
2019-09-26 14:49 ` Paolo Bonzini
2019-09-30 23:25 ` Nadav Amit
2019-09-30 23:34 ` Marc Orr
2019-09-30 23:58 ` Nadav Amit
2019-10-01 0:03 ` Marc Orr
2019-10-01 0:08 ` Nadav Amit
2019-10-01 0:12 ` Marc Orr
2019-10-01 0:37 ` Nadav Amit
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