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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Lukasz Luba <l.luba@partner.samsung.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, b.zolnierkie@samsung.com,
	kgene@kernel.org, mark.rutland@arm.com, cw00.choi@samsung.com,
	kyungmin.park@samsung.com, m.szyprowski@samsung.com,
	s.nawrocki@samsung.com, myungjoo.ham@samsung.com,
	robh+dt@kernel.org, willy.mh.wolff.ml@gmail.com
Subject: Re: [PATCH 1/3] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422
Date: Fri, 27 Sep 2019 10:53:59 +0200	[thread overview]
Message-ID: <20190927085359.GA19131@pi3> (raw)
In-Reply-To: <20190925161813.21117-2-l.luba@partner.samsung.com>

On Wed, Sep 25, 2019 at 06:18:11PM +0200, Lukasz Luba wrote:
> Add interrupt to Dynamic Memory Controller in Exynos5422 and Odroid
> XU3-family boards. It will be used instead of devfreq polling mode
> governor. The interrupt is connected to performance counters private
> for DMC, which might track utilisation of the memory channels.
> 
> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
> ---
>  arch/arm/boot/dts/exynos5420.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index ac49373baae7..72738e620d11 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -240,6 +240,8 @@
>  		dmc: memory-controller@10c20000 {
>  			compatible = "samsung,exynos5422-dmc";
>  			reg = <0x10c20000 0x100>, <0x10c30000 0x100>;
> +			interrupt-parent = <&combiner>;
> +			interrupts = <16 0>;

You register DMC for DREX0 and DREX1 but take only DREX0 interrupt. Why
skipping second?

Best regards,
Krzysztof


>  			clocks = <&clock CLK_FOUT_SPLL>,
>  				 <&clock CLK_MOUT_SCLK_SPLL>,
>  				 <&clock CLK_FF_DOUT_SPLL2>,
> -- 
> 2.17.1
> 

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Lukasz Luba <l.luba@partner.samsung.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	willy.mh.wolff.ml@gmail.com, linux-samsung-soc@vger.kernel.org,
	b.zolnierkie@samsung.com, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, robh+dt@kernel.org,
	cw00.choi@samsung.com, kyungmin.park@samsung.com,
	kgene@kernel.org, myungjoo.ham@samsung.com,
	s.nawrocki@samsung.com, linux-arm-kernel@lists.infradead.org,
	m.szyprowski@samsung.com
Subject: Re: [PATCH 1/3] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422
Date: Fri, 27 Sep 2019 10:53:59 +0200	[thread overview]
Message-ID: <20190927085359.GA19131@pi3> (raw)
In-Reply-To: <20190925161813.21117-2-l.luba@partner.samsung.com>

On Wed, Sep 25, 2019 at 06:18:11PM +0200, Lukasz Luba wrote:
> Add interrupt to Dynamic Memory Controller in Exynos5422 and Odroid
> XU3-family boards. It will be used instead of devfreq polling mode
> governor. The interrupt is connected to performance counters private
> for DMC, which might track utilisation of the memory channels.
> 
> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
> ---
>  arch/arm/boot/dts/exynos5420.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index ac49373baae7..72738e620d11 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -240,6 +240,8 @@
>  		dmc: memory-controller@10c20000 {
>  			compatible = "samsung,exynos5422-dmc";
>  			reg = <0x10c20000 0x100>, <0x10c30000 0x100>;
> +			interrupt-parent = <&combiner>;
> +			interrupts = <16 0>;

You register DMC for DREX0 and DREX1 but take only DREX0 interrupt. Why
skipping second?

Best regards,
Krzysztof


>  			clocks = <&clock CLK_FOUT_SPLL>,
>  				 <&clock CLK_MOUT_SCLK_SPLL>,
>  				 <&clock CLK_FF_DOUT_SPLL2>,
> -- 
> 2.17.1
> 

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  reply	other threads:[~2019-09-27  8:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20190925161841eucas1p12b3b798020b3493e9a4804d98b422f17@eucas1p1.samsung.com>
2019-09-25 16:18 ` [PATCH 0/3] Exynos5 DMC interrupt mode Lukasz Luba
2019-09-25 16:18   ` Lukasz Luba
2019-09-25 16:18   ` [PATCH 1/3] ARM: dts: exynos: Add interrupt to DMC controller in Exynos5422 Lukasz Luba
2019-09-25 16:18     ` Lukasz Luba
2019-09-27  8:53     ` Krzysztof Kozlowski [this message]
2019-09-27  8:53       ` Krzysztof Kozlowski
2019-10-01 12:38       ` Lukasz Luba
2019-10-01 12:38         ` Lukasz Luba
2019-09-25 16:18   ` [PATCH 2/3] ARM: dts: exynos: map 0x10000 SFR instead of 0x100 in DMC Exynos5422 Lukasz Luba
2019-09-25 16:18     ` Lukasz Luba
2019-09-25 16:18   ` [PATCH 3/3] memory: samsung: exynos5422-dmc: Add support for interrupt from performance counters Lukasz Luba
2019-09-25 16:18     ` Lukasz Luba
2019-09-27  9:19     ` Krzysztof Kozlowski
2019-09-27  9:19       ` Krzysztof Kozlowski
2019-10-01 10:11       ` Lukasz Luba
2019-10-01 10:11         ` Lukasz Luba

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