From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Remi Pommarel <repk@triplefau.lt>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] PCI: aardvark: Don't rely on jiffies while holding spinlock
Date: Fri, 27 Sep 2019 10:34:20 +0200 [thread overview]
Message-ID: <20190927103420.48bb9335@windsurf> (raw)
In-Reply-To: <20190927083142.8571-1-repk@triplefau.lt>
Hello Remi,
Thanks for the new iteration!
On Fri, 27 Sep 2019 10:31:42 +0200
Remi Pommarel <repk@triplefau.lt> wrote:
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index fc0fe4d4de49..ee05ccb2b686 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -175,7 +175,8 @@
> (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \
> PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where))
>
> -#define PIO_TIMEOUT_MS 1
> +#define PIO_RETRY_CNT 10
> +#define PIO_RETRY_DELAY 2 /* 2 us*/
So this changes the timeout from 1ms to just 20us, a division by 50
from the previous timeout value. From my measurements, it could
sometime take up to 6us from a single PIO read operation to complete,
which is getting close to the 20us timeout.
Shouldn't PIO_RETRY_CNT be kept at 500, so that we keep using a 1ms
timeout ?
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Remi Pommarel <repk@triplefau.lt>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] PCI: aardvark: Don't rely on jiffies while holding spinlock
Date: Fri, 27 Sep 2019 10:34:20 +0200 [thread overview]
Message-ID: <20190927103420.48bb9335@windsurf> (raw)
In-Reply-To: <20190927083142.8571-1-repk@triplefau.lt>
Hello Remi,
Thanks for the new iteration!
On Fri, 27 Sep 2019 10:31:42 +0200
Remi Pommarel <repk@triplefau.lt> wrote:
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index fc0fe4d4de49..ee05ccb2b686 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -175,7 +175,8 @@
> (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \
> PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where))
>
> -#define PIO_TIMEOUT_MS 1
> +#define PIO_RETRY_CNT 10
> +#define PIO_RETRY_DELAY 2 /* 2 us*/
So this changes the timeout from 1ms to just 20us, a division by 50
from the previous timeout value. From my measurements, it could
sometime take up to 6us from a single PIO read operation to complete,
which is getting close to the 20us timeout.
Shouldn't PIO_RETRY_CNT be kept at 500, so that we keep using a 1ms
timeout ?
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-09-27 8:34 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-27 8:31 [PATCH v2] PCI: aardvark: Don't rely on jiffies while holding spinlock Remi Pommarel
2019-09-27 8:31 ` Remi Pommarel
2019-09-27 8:34 ` Thomas Petazzoni [this message]
2019-09-27 8:34 ` Thomas Petazzoni
2019-09-27 8:50 ` Remi Pommarel
2019-09-27 8:50 ` Remi Pommarel
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