[PATCH] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for Microblaze

[PATCH] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for Microblaze

[Michal Simek]

From: Kuldeep Dave <kuldeep.dave@xilinx.com>

Add Microblaze as an arch that supports PCI_MSI_IRQ_DOMAIN.
Enabling msi.h generation is done by separate patch.

Similar change was done by commit 2a9af0273c1c
("PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for RISC-V")

Signed-off-by: Kuldeep Dave <kuldeep.dave@xilinx.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

Arch part was sent here:
https://lkml.org/lkml/2019/10/8/277
---
 drivers/pci/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index a304f5ea11b9..9d259372fbfd 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -52,7 +52,7 @@ config PCI_MSI
 	   If you don't know what to do here, say Y.
 
 config PCI_MSI_IRQ_DOMAIN
-	def_bool ARC || ARM || ARM64 || X86 || RISCV
+	def_bool ARC || ARM || ARM64 || X86 || RISCV || MICROBLAZE
 	depends on PCI_MSI
 	select GENERIC_MSI_IRQ_DOMAIN
 
-- 
2.17.1

Re: [PATCH] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for Microblaze

[Bjorn Helgaas]

On Tue, Oct 08, 2019 at 12:39:22PM +0200, Michal Simek wrote:
> From: Kuldeep Dave <kuldeep.dave@xilinx.com>
> 
> Add Microblaze as an arch that supports PCI_MSI_IRQ_DOMAIN.
> Enabling msi.h generation is done by separate patch.
> 
> Similar change was done by commit 2a9af0273c1c
> ("PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for RISC-V")
> 
> Signed-off-by: Kuldeep Dave <kuldeep.dave@xilinx.com>
> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Acked-by: Bjorn Helgaas <bhelgaas@google.com>

> Arch part was sent here:
> https://lkml.org/lkml/2019/10/8/277

Can you please squash this drivers/pci/Kconfig change into the same
patch as the arch/microblaze patch mentioned above?  That way there's
no ordering issue between the two patches.  I'd be glad to merge it,
or you can add my ack and apply it via the Microblaze tree.  Just let
me know which you prefer so I know whether to do something with this.

Sorry; I probably suggested the splitting in the first place for
RISC-V, but I think that was a mistake.

> ---
>  drivers/pci/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index a304f5ea11b9..9d259372fbfd 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -52,7 +52,7 @@ config PCI_MSI
>  	   If you don't know what to do here, say Y.
>  
>  config PCI_MSI_IRQ_DOMAIN
> -	def_bool ARC || ARM || ARM64 || X86 || RISCV
> +	def_bool ARC || ARM || ARM64 || X86 || RISCV || MICROBLAZE
>  	depends on PCI_MSI
>  	select GENERIC_MSI_IRQ_DOMAIN
>  
> -- 
> 2.17.1
> 

Re: [PATCH] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for Microblaze

[Michal Simek]

On 08. 10. 19 14:47, Bjorn Helgaas wrote:
> On Tue, Oct 08, 2019 at 12:39:22PM +0200, Michal Simek wrote:
>> From: Kuldeep Dave <kuldeep.dave@xilinx.com>
>>
>> Add Microblaze as an arch that supports PCI_MSI_IRQ_DOMAIN.
>> Enabling msi.h generation is done by separate patch.
>>
>> Similar change was done by commit 2a9af0273c1c
>> ("PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for RISC-V")
>>
>> Signed-off-by: Kuldeep Dave <kuldeep.dave@xilinx.com>
>> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> 
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> 
>> Arch part was sent here:
>> https://lkml.org/lkml/2019/10/8/277
> 
> Can you please squash this drivers/pci/Kconfig change into the same
> patch as the arch/microblaze patch mentioned above?  That way there's
> no ordering issue between the two patches.  I'd be glad to merge it,
> or you can add my ack and apply it via the Microblaze tree.  Just let
> me know which you prefer so I know whether to do something with this.
> 
> Sorry; I probably suggested the splitting in the first place for
> RISC-V, but I think that was a mistake.

I was splitting them based on RISC-V case to follow this pattern.
Anyway I will send v2 and please pick it via your tree.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs