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From: Alan Kao <alankao@andestech.com>
To: <paul.walmsley@sifive.com>, <palmer@sifive.com>
Cc: linux-riscv@lists.infradead.org
Subject: Does sfence.vma implicitly cover what fence.i does?
Date: Wed, 9 Oct 2019 16:53:14 +0800	[thread overview]
Message-ID: <20191009085313.GA14021@andestech.com> (raw)

Hi Paul, Palmer,

In arch/riscv/include/asm/tlbflush.h, the comment says

> Flush entire local TLB.  'sfence.vma' implicitly fences with the instruction
> cache as well, so a 'fence.i' is not necessary.

and in the privileged spec, it is stated that

> Executing an SFENCE.VMA instruction guarantees that any previous stores
> already visible to the current RISC-V hart are ordered before all subsequent
> implicit references from that hart to the memory-management data structures.

So my question is straightforward.  Is I-cache a kind of memory-management data
structure?  am I missing something here?

Thanks for any clarification.

Alan

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             reply	other threads:[~2019-10-09  8:53 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-09  8:53 Alan Kao [this message]
2019-10-16 18:55 ` Does sfence.vma implicitly cover what fence.i does? Paul Walmsley

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