From: Andrew Lunn <andrew@lunn.ch>
To: Martin Fuzzey <martin.fuzzey@flowbird.group>
Cc: netdev@vger.kernel.org
Subject: Re: [PATCH] net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag
Date: Wed, 23 Oct 2019 17:40:24 +0200 [thread overview]
Message-ID: <20191023154024.GC13748@lunn.ch> (raw)
In-Reply-To: <1571823889-16834-1-git-send-email-martin.fuzzey@flowbird.group>
On Wed, Oct 23, 2019 at 11:44:24AM +0200, Martin Fuzzey wrote:
> The LAN8740, like the 8720, also requires a reset after enabling clock.
> The datasheet [1] 3.8.5.1 says:
> "During a Hardware reset, an external clock must be supplied
> to the XTAL1/CLKIN signal."
>
> I have observed this issue on a custom i.MX6 based board with
> the LAN8740A.
>
> [1] http://ww1.microchip.com/downloads/en/DeviceDoc/8740a.pdf
>
> Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2019-10-23 15:40 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-23 9:44 [PATCH] net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag Martin Fuzzey
2019-10-23 15:40 ` Andrew Lunn [this message]
2019-10-24 4:45 ` David Miller
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