* [Intel-gfx] [PATCH 1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 19:51 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:51 UTC (permalink / raw)
To: intel-gfx
From: José Roberto de Souza <jose.souza@intel.com>
This will be helpful to diferentiate a set of GPUs
with the same GEN version.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 674e9e921839..12646b94af87 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1544,6 +1544,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
}
#define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
+#define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
#define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
#define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index e9940f932d26..78a383f63957 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -107,6 +107,7 @@ enum intel_ppgtt_type {
func(is_mobile); \
func(is_lp); \
func(require_force_probe); \
+ func(is_dgfx); \
/* Keep has_* in alphabetical order */ \
func(has_64bit_reloc); \
func(gpu_reset_clobbers_display); \
--
2.23.0
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^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 2/4] drm/i915: add new gen12 dgfx platform macro
@ 2019-10-24 19:51 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:51 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
From: Stuart Summers <stuart.summers@intel.com>
Add a new macro for GEN12 platforms to be grouped under dgfx feature
set.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Lucas De Marchi <lucas.de.marchi@intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f9a3bfe68689..04307e111f57 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -822,6 +822,10 @@ static const struct intel_device_info intel_tigerlake_12_info = {
.has_rps = false, /* XXX disabled for debugging */
};
+#define GEN12_DGFX_FEATURES \
+ GEN12_FEATURES, \
+ .is_dgfx = 1
+
#undef GEN
#undef PLATFORM
--
2.23.0
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^ permalink raw reply related [flat|nested] 26+ messages in thread* [Intel-gfx] [PATCH 2/4] drm/i915: add new gen12 dgfx platform macro
@ 2019-10-24 19:51 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:51 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
From: Stuart Summers <stuart.summers@intel.com>
Add a new macro for GEN12 platforms to be grouped under dgfx feature
set.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Lucas De Marchi <lucas.de.marchi@intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f9a3bfe68689..04307e111f57 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -822,6 +822,10 @@ static const struct intel_device_info intel_tigerlake_12_info = {
.has_rps = false, /* XXX disabled for debugging */
};
+#define GEN12_DGFX_FEATURES \
+ GEN12_FEATURES, \
+ .is_dgfx = 1
+
#undef GEN
#undef PLATFORM
--
2.23.0
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^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH 2/4] drm/i915: add new gen12 dgfx platform macro
@ 2019-10-24 19:55 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
On Thu, Oct 24, 2019 at 12:51:20PM -0700, Lucas De Marchi wrote:
>From: Stuart Summers <stuart.summers@intel.com>
>
>Add a new macro for GEN12 platforms to be grouped under dgfx feature
>set.
>
>Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>Signed-off-by: Lucas De Marchi <lucas.de.marchi@intel.com>
this should actually be
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/i915_pci.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>index f9a3bfe68689..04307e111f57 100644
>--- a/drivers/gpu/drm/i915/i915_pci.c
>+++ b/drivers/gpu/drm/i915/i915_pci.c
>@@ -822,6 +822,10 @@ static const struct intel_device_info intel_tigerlake_12_info = {
> .has_rps = false, /* XXX disabled for debugging */
> };
>
>+#define GEN12_DGFX_FEATURES \
>+ GEN12_FEATURES, \
>+ .is_dgfx = 1
>+
> #undef GEN
> #undef PLATFORM
>
>--
>2.23.0
>
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Intel-gfx] [PATCH 2/4] drm/i915: add new gen12 dgfx platform macro
@ 2019-10-24 19:55 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
On Thu, Oct 24, 2019 at 12:51:20PM -0700, Lucas De Marchi wrote:
>From: Stuart Summers <stuart.summers@intel.com>
>
>Add a new macro for GEN12 platforms to be grouped under dgfx feature
>set.
>
>Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>Signed-off-by: Lucas De Marchi <lucas.de.marchi@intel.com>
this should actually be
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/i915_pci.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>index f9a3bfe68689..04307e111f57 100644
>--- a/drivers/gpu/drm/i915/i915_pci.c
>+++ b/drivers/gpu/drm/i915/i915_pci.c
>@@ -822,6 +822,10 @@ static const struct intel_device_info intel_tigerlake_12_info = {
> .has_rps = false, /* XXX disabled for debugging */
> };
>
>+#define GEN12_DGFX_FEATURES \
>+ GEN12_FEATURES, \
>+ .is_dgfx = 1
>+
> #undef GEN
> #undef PLATFORM
>
>--
>2.23.0
>
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 2/4] drm/i915: add new gen12 dgfx platform macro
@ 2019-10-24 20:34 ` Souza, Jose
0 siblings, 0 replies; 26+ messages in thread
From: Souza, Jose @ 2019-10-24 20:34 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, De Marchi, Lucas
Cc: lucas.de.marchi@intel.com
On Thu, 2019-10-24 at 12:51 -0700, Lucas De Marchi wrote:
> From: Stuart Summers <stuart.summers@intel.com>
>
> Add a new macro for GEN12 platforms to be grouped under dgfx feature
> set.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.de.marchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_pci.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c
> b/drivers/gpu/drm/i915/i915_pci.c
> index f9a3bfe68689..04307e111f57 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -822,6 +822,10 @@ static const struct intel_device_info
> intel_tigerlake_12_info = {
> .has_rps = false, /* XXX disabled for debugging */
> };
>
> +#define GEN12_DGFX_FEATURES \
> + GEN12_FEATURES, \
> + .is_dgfx = 1
> +
> #undef GEN
> #undef PLATFORM
>
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Intel-gfx] [PATCH 2/4] drm/i915: add new gen12 dgfx platform macro
@ 2019-10-24 20:34 ` Souza, Jose
0 siblings, 0 replies; 26+ messages in thread
From: Souza, Jose @ 2019-10-24 20:34 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, De Marchi, Lucas
Cc: lucas.de.marchi@intel.com
On Thu, 2019-10-24 at 12:51 -0700, Lucas De Marchi wrote:
> From: Stuart Summers <stuart.summers@intel.com>
>
> Add a new macro for GEN12 platforms to be grouped under dgfx feature
> set.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.de.marchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_pci.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c
> b/drivers/gpu/drm/i915/i915_pci.c
> index f9a3bfe68689..04307e111f57 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -822,6 +822,10 @@ static const struct intel_device_info
> intel_tigerlake_12_info = {
> .has_rps = false, /* XXX disabled for debugging */
> };
>
> +#define GEN12_DGFX_FEATURES \
> + GEN12_FEATURES, \
> + .is_dgfx = 1
> +
> #undef GEN
> #undef PLATFORM
>
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^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 3/4] drm/i915: do not set MOCS control values on dgfx
@ 2019-10-24 19:51 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:51 UTC (permalink / raw)
To: intel-gfx
On dgfx there's no LLC and eDRAM control table. Since now this
also means the device has global MOCS, just return early on the
initialization function.
L3 settings still apply and still need to be tweaked.
Bspec: 45101
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 932833e5b712..9e19637e0225 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -462,6 +462,12 @@ static void intel_mocs_init_global(struct intel_gt *gt)
struct drm_i915_mocs_table table;
unsigned int index;
+ /*
+ * LLC and eDRAM control values are not only applicable to dgfx
+ */
+ if (IS_DGFX(gt->i915))
+ return;
+
GEM_BUG_ON(!HAS_GLOBAL_MOCS_REGISTERS(gt->i915));
if (!get_mocs_settings(gt->i915, &table))
--
2.23.0
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^ permalink raw reply related [flat|nested] 26+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915: do not set MOCS control values on dgfx
@ 2019-10-24 19:51 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:51 UTC (permalink / raw)
To: intel-gfx
On dgfx there's no LLC and eDRAM control table. Since now this
also means the device has global MOCS, just return early on the
initialization function.
L3 settings still apply and still need to be tweaked.
Bspec: 45101
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 932833e5b712..9e19637e0225 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -462,6 +462,12 @@ static void intel_mocs_init_global(struct intel_gt *gt)
struct drm_i915_mocs_table table;
unsigned int index;
+ /*
+ * LLC and eDRAM control values are not only applicable to dgfx
+ */
+ if (IS_DGFX(gt->i915))
+ return;
+
GEM_BUG_ON(!HAS_GLOBAL_MOCS_REGISTERS(gt->i915));
if (!get_mocs_settings(gt->i915, &table))
--
2.23.0
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^ permalink raw reply related [flat|nested] 26+ messages in thread
* Re: [PATCH 3/4] drm/i915: do not set MOCS control values on dgfx
@ 2019-10-25 16:49 ` Daniele Ceraolo Spurio
0 siblings, 0 replies; 26+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-10-25 16:49 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx
On 10/24/19 12:51 PM, Lucas De Marchi wrote:
> On dgfx there's no LLC and eDRAM control table. Since now this
> also means the device has global MOCS, just return early on the
> initialization function.
>
> L3 settings still apply and still need to be tweaked.
>
> Bspec: 45101
>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 932833e5b712..9e19637e0225 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -462,6 +462,12 @@ static void intel_mocs_init_global(struct intel_gt *gt)
> struct drm_i915_mocs_table table;
> unsigned int index;
>
> + /*
> + * LLC and eDRAM control values are not only applicable to dgfx
the "only" in this sentence is confusing IMO. With it removed:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
> + */
> + if (IS_DGFX(gt->i915))
> + return;
> +
> GEM_BUG_ON(!HAS_GLOBAL_MOCS_REGISTERS(gt->i915));
>
> if (!get_mocs_settings(gt->i915, &table))
>
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: do not set MOCS control values on dgfx
@ 2019-10-25 16:49 ` Daniele Ceraolo Spurio
0 siblings, 0 replies; 26+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-10-25 16:49 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx
On 10/24/19 12:51 PM, Lucas De Marchi wrote:
> On dgfx there's no LLC and eDRAM control table. Since now this
> also means the device has global MOCS, just return early on the
> initialization function.
>
> L3 settings still apply and still need to be tweaked.
>
> Bspec: 45101
>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 932833e5b712..9e19637e0225 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -462,6 +462,12 @@ static void intel_mocs_init_global(struct intel_gt *gt)
> struct drm_i915_mocs_table table;
> unsigned int index;
>
> + /*
> + * LLC and eDRAM control values are not only applicable to dgfx
the "only" in this sentence is confusing IMO. With it removed:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
> + */
> + if (IS_DGFX(gt->i915))
> + return;
> +
> GEM_BUG_ON(!HAS_GLOBAL_MOCS_REGISTERS(gt->i915));
>
> if (!get_mocs_settings(gt->i915, &table))
>
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^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 4/4] drm/i915: split gen11_irq_handler to make it shareable
@ 2019-10-24 19:51 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:51 UTC (permalink / raw)
To: intel-gfx
Split gen11_irq_handler() to receive as parameter the function
pointers. This allows to share the interrupt handler even if the enable/disable
functions are different.
Make sure it's always inlined to avoid the extra indirect call on the
hot path. Checking with gcc 9 this produce the exact same code as of
now:
$ size drivers/gpu/drm/i915/i915_irq*.o
text data bss dec hex filename
47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq.o
47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq_new.o
$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq.o' -ex 'disassemble gen11_irq_handler' > /tmp/old.s
$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq_new.o' -ex 'disassemble gen11_irq_handler' > /tmp/new.s
$ git diff --no-index /tmp/{old,new}.s
$
So, no change in behavior, just a simple refactor.
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 572a5c37cc61..8eb7d02b4a55 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2859,9 +2859,11 @@ static inline void gen11_master_intr_enable(void __iomem * const regs)
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
}
-static irqreturn_t gen11_irq_handler(int irq, void *arg)
+static __always_inline irqreturn_t
+__gen11_irq_handler(struct drm_i915_private * const i915,
+ u32 (*intr_disable)(void __iomem * const regs),
+ void (*intr_enable)(void __iomem * const regs))
{
- struct drm_i915_private * const i915 = arg;
void __iomem * const regs = i915->uncore.regs;
struct intel_gt *gt = &i915->gt;
u32 master_ctl;
@@ -2870,9 +2872,9 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
if (!intel_irqs_enabled(i915))
return IRQ_NONE;
- master_ctl = gen11_master_intr_disable(regs);
+ master_ctl = intr_disable(regs);
if (!master_ctl) {
- gen11_master_intr_enable(regs);
+ intr_enable(regs);
return IRQ_NONE;
}
@@ -2894,13 +2896,20 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
- gen11_master_intr_enable(regs);
+ intr_enable(regs);
gen11_gu_misc_irq_handler(gt, gu_misc_iir);
return IRQ_HANDLED;
}
+static irqreturn_t gen11_irq_handler(int irq, void *arg)
+{
+ return __gen11_irq_handler(arg,
+ gen11_master_intr_disable,
+ gen11_master_intr_enable);
+}
+
/* Called from drm generic code, passed 'crtc' which
* we use as a pipe index
*/
--
2.23.0
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^ permalink raw reply related [flat|nested] 26+ messages in thread* [Intel-gfx] [PATCH 4/4] drm/i915: split gen11_irq_handler to make it shareable
@ 2019-10-24 19:51 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:51 UTC (permalink / raw)
To: intel-gfx
Split gen11_irq_handler() to receive as parameter the function
pointers. This allows to share the interrupt handler even if the enable/disable
functions are different.
Make sure it's always inlined to avoid the extra indirect call on the
hot path. Checking with gcc 9 this produce the exact same code as of
now:
$ size drivers/gpu/drm/i915/i915_irq*.o
text data bss dec hex filename
47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq.o
47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq_new.o
$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq.o' -ex 'disassemble gen11_irq_handler' > /tmp/old.s
$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq_new.o' -ex 'disassemble gen11_irq_handler' > /tmp/new.s
$ git diff --no-index /tmp/{old,new}.s
$
So, no change in behavior, just a simple refactor.
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 572a5c37cc61..8eb7d02b4a55 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2859,9 +2859,11 @@ static inline void gen11_master_intr_enable(void __iomem * const regs)
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
}
-static irqreturn_t gen11_irq_handler(int irq, void *arg)
+static __always_inline irqreturn_t
+__gen11_irq_handler(struct drm_i915_private * const i915,
+ u32 (*intr_disable)(void __iomem * const regs),
+ void (*intr_enable)(void __iomem * const regs))
{
- struct drm_i915_private * const i915 = arg;
void __iomem * const regs = i915->uncore.regs;
struct intel_gt *gt = &i915->gt;
u32 master_ctl;
@@ -2870,9 +2872,9 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
if (!intel_irqs_enabled(i915))
return IRQ_NONE;
- master_ctl = gen11_master_intr_disable(regs);
+ master_ctl = intr_disable(regs);
if (!master_ctl) {
- gen11_master_intr_enable(regs);
+ intr_enable(regs);
return IRQ_NONE;
}
@@ -2894,13 +2896,20 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
- gen11_master_intr_enable(regs);
+ intr_enable(regs);
gen11_gu_misc_irq_handler(gt, gu_misc_iir);
return IRQ_HANDLED;
}
+static irqreturn_t gen11_irq_handler(int irq, void *arg)
+{
+ return __gen11_irq_handler(arg,
+ gen11_master_intr_disable,
+ gen11_master_intr_enable);
+}
+
/* Called from drm generic code, passed 'crtc' which
* we use as a pipe index
*/
--
2.23.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH 4/4] drm/i915: split gen11_irq_handler to make it shareable
@ 2019-10-24 19:57 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:57 UTC (permalink / raw)
To: intel-gfx
On Thu, Oct 24, 2019 at 12:51:22PM -0700, Lucas De Marchi wrote:
>Split gen11_irq_handler() to receive as parameter the function
>pointers. This allows to share the interrupt handler even if the enable/disable
>functions are different.
>
>Make sure it's always inlined to avoid the extra indirect call on the
>hot path. Checking with gcc 9 this produce the exact same code as of
>now:
>
>$ size drivers/gpu/drm/i915/i915_irq*.o
> text data bss dec hex filename
> 47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq.o
> 47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq_new.o
>
>$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq.o' -ex 'disassemble gen11_irq_handler' > /tmp/old.s
>$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq_new.o' -ex 'disassemble gen11_irq_handler' > /tmp/new.s
>$ git diff --no-index /tmp/{old,new}.s
>$
>
>So, no change in behavior, just a simple refactor.
>
>Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>---
> drivers/gpu/drm/i915/i915_irq.c | 19 ++++++++++++++-----
> 1 file changed, 14 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index 572a5c37cc61..8eb7d02b4a55 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -2859,9 +2859,11 @@ static inline void gen11_master_intr_enable(void __iomem * const regs)
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
> }
>
>-static irqreturn_t gen11_irq_handler(int irq, void *arg)
>+static __always_inline irqreturn_t
>+__gen11_irq_handler(struct drm_i915_private * const i915,
>+ u32 (*intr_disable)(void __iomem * const regs),
>+ void (*intr_enable)(void __iomem * const regs))
offline review from Chris:
Hmm. __always_inline indeed should avoid the compiler using vfuncs here,
no matter how may times we use the same base handler.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Lucas De Marchi
> {
>- struct drm_i915_private * const i915 = arg;
> void __iomem * const regs = i915->uncore.regs;
> struct intel_gt *gt = &i915->gt;
> u32 master_ctl;
>@@ -2870,9 +2872,9 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
> if (!intel_irqs_enabled(i915))
> return IRQ_NONE;
>
>- master_ctl = gen11_master_intr_disable(regs);
>+ master_ctl = intr_disable(regs);
> if (!master_ctl) {
>- gen11_master_intr_enable(regs);
>+ intr_enable(regs);
> return IRQ_NONE;
> }
>
>@@ -2894,13 +2896,20 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
>
> gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
>
>- gen11_master_intr_enable(regs);
>+ intr_enable(regs);
>
> gen11_gu_misc_irq_handler(gt, gu_misc_iir);
>
> return IRQ_HANDLED;
> }
>
>+static irqreturn_t gen11_irq_handler(int irq, void *arg)
>+{
>+ return __gen11_irq_handler(arg,
>+ gen11_master_intr_disable,
>+ gen11_master_intr_enable);
>+}
>+
> /* Called from drm generic code, passed 'crtc' which
> * we use as a pipe index
> */
>--
>2.23.0
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Intel-gfx] [PATCH 4/4] drm/i915: split gen11_irq_handler to make it shareable
@ 2019-10-24 19:57 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 19:57 UTC (permalink / raw)
To: intel-gfx
On Thu, Oct 24, 2019 at 12:51:22PM -0700, Lucas De Marchi wrote:
>Split gen11_irq_handler() to receive as parameter the function
>pointers. This allows to share the interrupt handler even if the enable/disable
>functions are different.
>
>Make sure it's always inlined to avoid the extra indirect call on the
>hot path. Checking with gcc 9 this produce the exact same code as of
>now:
>
>$ size drivers/gpu/drm/i915/i915_irq*.o
> text data bss dec hex filename
> 47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq.o
> 47511 560 0 48071 bbc7 drivers/gpu/drm/i915/i915_irq_new.o
>
>$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq.o' -ex 'disassemble gen11_irq_handler' > /tmp/old.s
>$ gdb -batch -ex 'file drivers/gpu/drm/i915/i915_irq_new.o' -ex 'disassemble gen11_irq_handler' > /tmp/new.s
>$ git diff --no-index /tmp/{old,new}.s
>$
>
>So, no change in behavior, just a simple refactor.
>
>Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>---
> drivers/gpu/drm/i915/i915_irq.c | 19 ++++++++++++++-----
> 1 file changed, 14 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index 572a5c37cc61..8eb7d02b4a55 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -2859,9 +2859,11 @@ static inline void gen11_master_intr_enable(void __iomem * const regs)
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
> }
>
>-static irqreturn_t gen11_irq_handler(int irq, void *arg)
>+static __always_inline irqreturn_t
>+__gen11_irq_handler(struct drm_i915_private * const i915,
>+ u32 (*intr_disable)(void __iomem * const regs),
>+ void (*intr_enable)(void __iomem * const regs))
offline review from Chris:
Hmm. __always_inline indeed should avoid the compiler using vfuncs here,
no matter how may times we use the same base handler.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Lucas De Marchi
> {
>- struct drm_i915_private * const i915 = arg;
> void __iomem * const regs = i915->uncore.regs;
> struct intel_gt *gt = &i915->gt;
> u32 master_ctl;
>@@ -2870,9 +2872,9 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
> if (!intel_irqs_enabled(i915))
> return IRQ_NONE;
>
>- master_ctl = gen11_master_intr_disable(regs);
>+ master_ctl = intr_disable(regs);
> if (!master_ctl) {
>- gen11_master_intr_enable(regs);
>+ intr_enable(regs);
> return IRQ_NONE;
> }
>
>@@ -2894,13 +2896,20 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
>
> gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
>
>- gen11_master_intr_enable(regs);
>+ intr_enable(regs);
>
> gen11_gu_misc_irq_handler(gt, gu_misc_iir);
>
> return IRQ_HANDLED;
> }
>
>+static irqreturn_t gen11_irq_handler(int irq, void *arg)
>+{
>+ return __gen11_irq_handler(arg,
>+ gen11_master_intr_disable,
>+ gen11_master_intr_enable);
>+}
>+
> /* Called from drm generic code, passed 'crtc' which
> * we use as a pipe index
> */
>--
>2.23.0
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 22:08 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 22:08 UTC (permalink / raw)
To: intel-gfx
On Thu, Oct 24, 2019 at 12:51:19PM -0700, Lucas De Marchi wrote:
>From: José Roberto de Souza <jose.souza@intel.com>
>
>This will be helpful to diferentiate a set of GPUs
>with the same GEN version.
>
>Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> 2 files changed, 2 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 674e9e921839..12646b94af87 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -1544,6 +1544,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> }
>
> #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
>+#define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
>
> #define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
> #define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
>diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>index e9940f932d26..78a383f63957 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.h
>+++ b/drivers/gpu/drm/i915/intel_device_info.h
>@@ -107,6 +107,7 @@ enum intel_ppgtt_type {
> func(is_mobile); \
> func(is_lp); \
> func(require_force_probe); \
>+ func(is_dgfx); \
> /* Keep has_* in alphabetical order */ \
> func(has_64bit_reloc); \
> func(gpu_reset_clobbers_display); \
>--
>2.23.0
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Intel-gfx] [PATCH 1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 22:08 ` Lucas De Marchi
0 siblings, 0 replies; 26+ messages in thread
From: Lucas De Marchi @ 2019-10-24 22:08 UTC (permalink / raw)
To: intel-gfx
On Thu, Oct 24, 2019 at 12:51:19PM -0700, Lucas De Marchi wrote:
>From: José Roberto de Souza <jose.souza@intel.com>
>
>This will be helpful to diferentiate a set of GPUs
>with the same GEN version.
>
>Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> 2 files changed, 2 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 674e9e921839..12646b94af87 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -1544,6 +1544,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> }
>
> #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
>+#define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
>
> #define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
> #define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
>diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>index e9940f932d26..78a383f63957 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.h
>+++ b/drivers/gpu/drm/i915/intel_device_info.h
>@@ -107,6 +107,7 @@ enum intel_ppgtt_type {
> func(is_mobile); \
> func(is_lp); \
> func(require_force_probe); \
>+ func(is_dgfx); \
> /* Keep has_* in alphabetical order */ \
> func(has_64bit_reloc); \
> func(gpu_reset_clobbers_display); \
>--
>2.23.0
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 23:09 ` Rodrigo Vivi
0 siblings, 0 replies; 26+ messages in thread
From: Rodrigo Vivi @ 2019-10-24 23:09 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
On Thu, Oct 24, 2019 at 03:08:59PM -0700, Lucas De Marchi wrote:
> On Thu, Oct 24, 2019 at 12:51:19PM -0700, Lucas De Marchi wrote:
> > From: José Roberto de Souza <jose.souza@intel.com>
> >
> > This will be helpful to diferentiate a set of GPUs
> > with the same GEN version.
> >
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Lucas De Marchi
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_device_info.h | 1 +
> > 2 files changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 674e9e921839..12646b94af87 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1544,6 +1544,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> > }
> >
> > #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
> > +#define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
> >
> > #define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
> > #define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index e9940f932d26..78a383f63957 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -107,6 +107,7 @@ enum intel_ppgtt_type {
> > func(is_mobile); \
> > func(is_lp); \
> > func(require_force_probe); \
> > + func(is_dgfx); \
> > /* Keep has_* in alphabetical order */ \
> > func(has_64bit_reloc); \
> > func(gpu_reset_clobbers_display); \
> > --
> > 2.23.0
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [Intel-gfx] [PATCH 1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 23:09 ` Rodrigo Vivi
0 siblings, 0 replies; 26+ messages in thread
From: Rodrigo Vivi @ 2019-10-24 23:09 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
On Thu, Oct 24, 2019 at 03:08:59PM -0700, Lucas De Marchi wrote:
> On Thu, Oct 24, 2019 at 12:51:19PM -0700, Lucas De Marchi wrote:
> > From: José Roberto de Souza <jose.souza@intel.com>
> >
> > This will be helpful to diferentiate a set of GPUs
> > with the same GEN version.
> >
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Lucas De Marchi
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_device_info.h | 1 +
> > 2 files changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 674e9e921839..12646b94af87 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1544,6 +1544,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> > }
> >
> > #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
> > +#define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
> >
> > #define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830)
> > #define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G)
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index e9940f932d26..78a383f63957 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -107,6 +107,7 @@ enum intel_ppgtt_type {
> > func(is_mobile); \
> > func(is_lp); \
> > func(require_force_probe); \
> > + func(is_dgfx); \
> > /* Keep has_* in alphabetical order */ \
> > func(has_64bit_reloc); \
> > func(gpu_reset_clobbers_display); \
> > --
> > 2.23.0
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 22:37 ` Patchwork
0 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2019-10-24 22:37 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Add is_dgfx to device info
URL : https://patchwork.freedesktop.org/series/68535/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a706b75f5303 drm/i915: Add is_dgfx to device info
5822be50ff35 drm/i915: add new gen12 dgfx platform macro
90014b1e5efb drm/i915: do not set MOCS control values on dgfx
5e76020d0a7f drm/i915: split gen11_irq_handler to make it shareable
-:7: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#7:
pointers. This allows to share the interrupt handler even if the enable/disable
total: 0 errors, 1 warnings, 0 checks, 45 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 22:37 ` Patchwork
0 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2019-10-24 22:37 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Add is_dgfx to device info
URL : https://patchwork.freedesktop.org/series/68535/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a706b75f5303 drm/i915: Add is_dgfx to device info
5822be50ff35 drm/i915: add new gen12 dgfx platform macro
90014b1e5efb drm/i915: do not set MOCS control values on dgfx
5e76020d0a7f drm/i915: split gen11_irq_handler to make it shareable
-:7: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#7:
pointers. This allows to share the interrupt handler even if the enable/disable
total: 0 errors, 1 warnings, 0 checks, 45 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-24 23:06 ` Patchwork
0 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2019-10-24 23:06 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Add is_dgfx to device info
URL : https://patchwork.freedesktop.org/series/68535/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7176 -> Patchwork_14974
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/index.html
Known issues
------------
Here are the changes found in Patchwork_14974 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_wait@basic-await-all:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/fi-icl-u3/igt@gem_wait@basic-await-all.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/fi-icl-u3/igt@gem_wait@basic-await-all.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html
* {igt@i915_selftest@live_gt_heartbeat}:
- fi-kbl-x1275: [DMESG-FAIL][5] ([fdo#112096]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/fi-kbl-x1275/igt@i915_selftest@live_gt_heartbeat.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/fi-kbl-x1275/igt@i915_selftest@live_gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#112057]: https://bugs.freedesktop.org/show_bug.cgi?id=112057
[fdo#112096]: https://bugs.freedesktop.org/show_bug.cgi?id=112096
Participating hosts (49 -> 45)
------------------------------
Additional (2): fi-bxt-dsi fi-icl-dsi
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7176 -> Patchwork_14974
CI-20190529: 20190529
CI_DRM_7176: 9c250db49037a2ef0dc499d6cd2f9712fcbdf8c0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5237: 9a46404de7c42c8cc2d492176e956597ef28d7c4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14974: 5e76020d0a7f5592415eefe90ad947f90947fa7d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5e76020d0a7f drm/i915: split gen11_irq_handler to make it shareable
90014b1e5efb drm/i915: do not set MOCS control values on dgfx
5822be50ff35 drm/i915: add new gen12 dgfx platform macro
a706b75f5303 drm/i915: Add is_dgfx to device info
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 26+ messages in thread* ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Add is_dgfx to device info
@ 2019-10-26 9:03 ` Patchwork
0 siblings, 0 replies; 26+ messages in thread
From: Patchwork @ 2019-10-26 9:03 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/4] drm/i915: Add is_dgfx to device info
URL : https://patchwork.freedesktop.org/series/68535/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7176_full -> Patchwork_14974_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_14974_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@vcs0-s3:
- shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-apl2/igt@gem_ctx_isolation@vcs0-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-apl4/igt@gem_ctx_isolation@vcs0-s3.html
* igt@gem_ctx_isolation@vcs1-clean:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb2/igt@gem_ctx_isolation@vcs1-clean.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb7/igt@gem_ctx_isolation@vcs1-clean.html
* igt@gem_ctx_switch@vcs1:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112080]) +6 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb4/igt@gem_ctx_switch@vcs1.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb5/igt@gem_ctx_switch@vcs1.html
* igt@gem_eio@reset-stress:
- shard-snb: [PASS][7] -> [FAIL][8] ([fdo#109661])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-snb7/igt@gem_eio@reset-stress.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-snb1/igt@gem_eio@reset-stress.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#111325]) +5 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb7/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-hsw: [PASS][11] -> [FAIL][12] ([fdo#112037])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-hsw1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-hsw: [PASS][13] -> [DMESG-WARN][14] ([fdo#111870])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-hsw8/igt@gem_userptr_blits@dmabuf-unsync.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-hsw5/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@sync-unmap-after-close:
- shard-snb: [PASS][15] -> [DMESG-WARN][16] ([fdo#111870])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-snb7/igt@gem_userptr_blits@sync-unmap-after-close.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-snb4/igt@gem_userptr_blits@sync-unmap-after-close.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108682])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-skl8/igt@kms_color@pipe-a-ctm-0-5.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-skl4/igt@kms_color@pipe-a-ctm-0-5.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#105363]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-skl5/igt@kms_flip@flip-vs-expired-vblank.html
- shard-glk: [PASS][21] -> [FAIL][22] ([fdo#105363])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-glk5/igt@kms_flip@flip-vs-expired-vblank.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-glk9/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-modeset-vs-hang-interruptible:
- shard-apl: [PASS][23] -> [INCOMPLETE][24] ([fdo#103927]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-apl4/igt@kms_flip@flip-vs-modeset-vs-hang-interruptible.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-apl7/igt@kms_flip@flip-vs-modeset-vs-hang-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite:
- shard-iclb: [PASS][25] -> [FAIL][26] ([fdo#103167]) +6 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][27] -> [DMESG-WARN][28] ([fdo#108566]) +6 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][29] -> [FAIL][30] ([fdo#108145] / [fdo#110403])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb7/igt@kms_psr@psr2_primary_page_flip.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][33] -> [FAIL][34] ([fdo#99912])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-apl4/igt@kms_setmode@basic.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-apl7/igt@kms_setmode@basic.html
- shard-skl: [PASS][35] -> [FAIL][36] ([fdo#99912])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-skl2/igt@kms_setmode@basic.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-skl5/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-kbl: [PASS][37] -> [INCOMPLETE][38] ([fdo#103665])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-kbl7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-kbl2/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@prime_vgem@wait-bsd2:
- shard-iclb: [PASS][39] -> [SKIP][40] ([fdo#109276]) +8 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb4/igt@prime_vgem@wait-bsd2.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb5/igt@prime_vgem@wait-bsd2.html
#### Possible fixes ####
* igt@gem_busy@busy-vcs1:
- shard-iclb: [SKIP][41] ([fdo#112080]) -> [PASS][42] +9 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb5/igt@gem_busy@busy-vcs1.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb4/igt@gem_busy@busy-vcs1.html
* igt@gem_ctx_shared@q-smoketest-all:
- {shard-tglb}: [INCOMPLETE][43] ([fdo#111735]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-tglb4/igt@gem_ctx_shared@q-smoketest-all.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-tglb1/igt@gem_ctx_shared@q-smoketest-all.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [SKIP][45] ([fdo#111325]) -> [PASS][46] +2 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb1/igt@gem_exec_schedule@in-order-bsd.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb3/igt@gem_exec_schedule@in-order-bsd.html
* igt@gem_linear_blits@interruptible:
- shard-apl: [INCOMPLETE][47] ([fdo#103927] / [fdo#112067]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-apl8/igt@gem_linear_blits@interruptible.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-apl4/igt@gem_linear_blits@interruptible.html
* igt@gem_mmap_gtt@basic-wc:
- shard-hsw: [INCOMPLETE][49] ([fdo#103540]) -> [PASS][50] +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-hsw7/igt@gem_mmap_gtt@basic-wc.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-hsw4/igt@gem_mmap_gtt@basic-wc.html
* {igt@gem_mmap_gtt@close-race}:
- shard-iclb: [INCOMPLETE][51] ([fdo#107713]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb7/igt@gem_mmap_gtt@close-race.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb8/igt@gem_mmap_gtt@close-race.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-snb: [FAIL][53] ([fdo#112037]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-snb6/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-snb2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@i915_selftest@live_hangcheck:
- shard-snb: [INCOMPLETE][55] ([fdo#105411]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-snb4/igt@i915_selftest@live_hangcheck.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-snb1/igt@i915_selftest@live_hangcheck.html
- shard-iclb: [INCOMPLETE][57] ([fdo#107713] / [fdo#108569]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb2/igt@i915_selftest@live_hangcheck.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb7/igt@i915_selftest@live_hangcheck.html
* igt@i915_suspend@sysfs-reader:
- {shard-tglb}: [INCOMPLETE][59] ([fdo#111832] / [fdo#111850]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-tglb7/igt@i915_suspend@sysfs-reader.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-tglb2/igt@i915_suspend@sysfs-reader.html
* igt@kms_color@pipe-b-ctm-0-25:
- shard-skl: [DMESG-WARN][61] ([fdo#106107]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-skl2/igt@kms_color@pipe-b-ctm-0-25.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-skl8/igt@kms_color@pipe-b-ctm-0-25.html
* igt@kms_cursor_crc@pipe-a-cursor-64x21-random:
- shard-skl: [FAIL][63] ([fdo#103232]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-skl9/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-64x21-random.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-iclb: [FAIL][65] ([fdo#103167]) -> [PASS][66] +3 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][67] ([fdo#108566]) -> [PASS][68] +9 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
- shard-apl: [DMESG-WARN][69] ([fdo#108566]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-apl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-apl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- {shard-tglb}: [FAIL][71] ([fdo#103167]) -> [PASS][72] +3 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][73] ([fdo#108145]) -> [PASS][74] +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_setmode@basic:
- shard-kbl: [FAIL][75] ([fdo#99912]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-kbl2/igt@kms_setmode@basic.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-kbl7/igt@kms_setmode@basic.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][77] ([fdo#109276]) -> [PASS][78] +15 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb8/igt@prime_busy@hang-bsd2.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb4/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][79] ([fdo#111329]) -> [SKIP][80] ([fdo#109276] / [fdo#112080])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [SKIP][81] ([fdo#109276]) -> [FAIL][82] ([fdo#111330])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb7/igt@gem_mocs_settings@mocs-settings-bsd2.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb4/igt@gem_mocs_settings@mocs-settings-bsd2.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][83] ([fdo#109441]) -> [DMESG-WARN][84] ([fdo#107724])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7176/shard-iclb4/igt@kms_psr@psr2_suspend.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/shard-iclb2/igt@kms_psr@psr2_suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108682]: https://bugs.freedesktop.org/show_bug.cgi?id=108682
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#111646]: https://bugs.freedesktop.org/show_bug.cgi?id=111646
[fdo#111671]: https://bugs.freedesktop.org/show_bug.cgi?id=111671
[fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
[fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
[fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
[fdo#111781]: https://bugs.freedesktop.org/show_bug.cgi?id=111781
[fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
[fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#111884]: https://bugs.freedesktop.org/show_bug.cgi?id=111884
[fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037
[fdo#112067]: https://bugs.freedesktop.org/show_bug.cgi?id=112067
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (11 -> 10)
------------------------------
Missing (1): pig-skl-6260u
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7176 -> Patchwork_14974
CI-20190529: 20190529
CI_DRM_7176: 9c250db49037a2ef0dc499d6cd2f9712fcbdf8c0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5237: 9a46404de7c42c8cc2d492176e956597ef28d7c4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14974: 5e76020d0a7f5592415eefe90ad947f90947fa7d @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14974/index.html
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Intel-gfx@lists.freedesktop.org
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