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From: Stephen Boyd <sboyd@kernel.org>
To: Leonard Crestez <leonard.crestez@nxp.com>,
	Shawn Guo <shawnguo@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Dong Aisheng <aisheng.dong@nxp.com>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Jacky Bai <ping.bai@nxp.com>, Anson Huang <Anson.Huang@nxp.com>,
	Abel Vesa <abel.vesa@nxp.com>,
	linux-clk@vger.kernel.org, kernel@pengutronix.de,
	linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM
Date: Mon, 28 Oct 2019 02:45:48 -0700	[thread overview]
Message-ID: <20191028094549.4920E208C0@mail.kernel.org> (raw)
In-Reply-To: <f5d2b9c53f1ed5ccb1dd3c6624f56759d92e1689.1571771777.git.leonard.crestez@nxp.com>

Quoting Leonard Crestez (2019-10-22 12:21:28)
> During cpu frequency switching the main "CLK_ARM" is reparented to an
> intermediate "step" clock. On imx8mm and imx8mn the 24M oscillator is
> used for this purpose but it is extremely slow, increasing wakeup
> latencies to the point that i2c transactions can timeout and system
> becomes unresponsive.
> 
> Fix by switching the "step" clk to SYS_PLL1_800M, matching the behavior
> of imx8m cpufreq drivers in imx vendor tree.
> 
> This bug was not immediately apparent because upstream arm64 defconfig
> uses the "performance" governor by default so no cpufreq transitions
> happen.
> 
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> ---

Applied to clk-fixes


WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Leonard Crestez <leonard.crestez@nxp.com>,
	Shawn Guo <shawnguo@kernel.org>
Cc: Dong Aisheng <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
	Anson Huang <Anson.Huang@nxp.com>,
	Michael Turquette <mturquette@baylibre.com>,
	linux-imx@nxp.com, kernel@pengutronix.de,
	Fabio Estevam <fabio.estevam@nxp.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Abel Vesa <abel.vesa@nxp.com>
Subject: Re: [PATCH] clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM
Date: Mon, 28 Oct 2019 02:45:48 -0700	[thread overview]
Message-ID: <20191028094549.4920E208C0@mail.kernel.org> (raw)
In-Reply-To: <f5d2b9c53f1ed5ccb1dd3c6624f56759d92e1689.1571771777.git.leonard.crestez@nxp.com>

Quoting Leonard Crestez (2019-10-22 12:21:28)
> During cpu frequency switching the main "CLK_ARM" is reparented to an
> intermediate "step" clock. On imx8mm and imx8mn the 24M oscillator is
> used for this purpose but it is extremely slow, increasing wakeup
> latencies to the point that i2c transactions can timeout and system
> becomes unresponsive.
> 
> Fix by switching the "step" clk to SYS_PLL1_800M, matching the behavior
> of imx8m cpufreq drivers in imx vendor tree.
> 
> This bug was not immediately apparent because upstream arm64 defconfig
> uses the "performance" governor by default so no cpufreq transitions
> happen.
> 
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> ---

Applied to clk-fixes


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  parent reply	other threads:[~2019-10-28  9:45 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-22 19:21 [PATCH] clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM Leonard Crestez
2019-10-22 19:21 ` Leonard Crestez
2019-10-28  8:35 ` Shawn Guo
2019-10-28  8:35   ` Shawn Guo
2019-10-28  9:45 ` Stephen Boyd [this message]
2019-10-28  9:45   ` Stephen Boyd
     [not found] ` <20191026131046.00973206DD@mail.kernel.org>
2019-10-28 14:18   ` Leonard Crestez

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