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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Hans de Goede <hdegoede@redhat.com>
Subject: Re: [PATCH] gpio/pinctrl: Add pin ranges before gpiochip
Date: Wed, 30 Oct 2019 17:31:49 +0200	[thread overview]
Message-ID: <20191030153149.GH2593@lahna.fi.intel.com> (raw)
In-Reply-To: <20191030144940.21133-1-linus.walleij@linaro.org>

On Wed, Oct 30, 2019 at 03:49:40PM +0100, Linus Walleij wrote:
> This fixes a semantic ordering issue as we need to add
> pin ranges before adding gpiochips when gpiochips use
> pin control as a backend: as it needs to talk to the
> pin control backend during initialization, the backend
> needs to be there already.
> 
> Other drivers in the tree using pincontrol as backend do
> not necessarily have this problem, as they might not need
> to access the pincontrol portions during initialization.
> 
> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
> Reported-by: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Looks good to me as well. Are you going to take this?

In that case

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>

  parent reply	other threads:[~2019-10-30 15:31 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-30 14:49 [PATCH] gpio/pinctrl: Add pin ranges before gpiochip Linus Walleij
2019-10-30 14:55 ` Hans de Goede
2019-10-30 15:11 ` Andy Shevchenko
2019-10-30 15:31 ` Mika Westerberg [this message]
2019-10-30 15:48 ` Hans de Goede
2019-10-30 16:01   ` Hans de Goede
2019-10-30 16:04     ` Linus Walleij
2019-10-30 16:10       ` Mika Westerberg
2019-11-02 10:53         ` Andy Shevchenko
2019-11-03 22:43     ` Linus Walleij
2019-10-30 16:07   ` Linus Walleij
2019-11-01 15:22     ` Thierry Reding

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