Re: [PATCH v3 1/3] watchdog: sama5d4_wdt: cleanup the bit definitions

[Guenter Roeck <linux@roeck-us.net>]

On Thu, Nov 14, 2019 at 11:34:31AM +0000, Eugen.Hristev@microchip.com wrote:
> 
> 
> On 12.11.2019 15:47, Guenter Roeck wrote:
> 
> > 
> > On 11/11/19 4:13 AM, Eugen.Hristev@microchip.com wrote:
> >> From: Eugen Hristev <eugen.hristev@microchip.com>
> >>
> >> Cleanup the macro definitions to use BIT and align with two spaces.
> >>
> >> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> >> ---
> >> Changes in v3:
> >> - new patch as requested from review on ML
> >>
> >>   drivers/watchdog/at91sam9_wdt.h | 30 +++++++++++++++---------------
> >>   1 file changed, 15 insertions(+), 15 deletions(-)
> >>
> >> diff --git a/drivers/watchdog/at91sam9_wdt.h 
> >> b/drivers/watchdog/at91sam9_wdt.h
> >> index 390941c..2ca5fc5 100644
> >> --- a/drivers/watchdog/at91sam9_wdt.h
> >> +++ b/drivers/watchdog/at91sam9_wdt.h
> >> @@ -14,23 +14,23 @@
> >>   #define AT91_WDT_H
> >>   #define AT91_WDT_CR        0x00            /* Watchdog Control 
> >> Register */
> >> -#define        AT91_WDT_WDRSTT        (1    << 0)        /* Restart */
> >> -#define        AT91_WDT_KEY        (0xa5 << 24)        /* KEY 
> >> Password */
> >> +#define  AT91_WDT_WDRSTT    BIT(0)            /* Restart */
> > 
> > Using BIT() requires including linux/bits.h.
> 
> 
> Hi Guenter,
> 
> The C files include/will include the bits.h as the drivers use this 
> definition header, or, you have something else in mind ?
> 
You are supposed to include the file where it is used. If the C file
uses it again, it will need to include it again.

Guenter

> Thanks,
> Eugen
> 
> > 
> >> +#define  AT91_WDT_KEY        (0xa5 << 24)        /* KEY Password */
> >>   #define AT91_WDT_MR        0x04            /* Watchdog Mode Register */
> >> -#define        AT91_WDT_WDV        (0xfff << 0)        /* Counter 
> >> Value */
> >> -#define            AT91_WDT_SET_WDV(x)    ((x) & AT91_WDT_WDV)
> >> -#define        AT91_WDT_WDFIEN        (1     << 12)        /* Fault 
> >> Interrupt Enable */
> >> -#define        AT91_WDT_WDRSTEN    (1     << 13)        /* Reset 
> >> Processor */
> >> -#define        AT91_WDT_WDRPROC    (1     << 14)        /* Timer 
> >> Restart */
> >> -#define        AT91_WDT_WDDIS        (1     << 15)        /* Watchdog 
> >> Disable */
> >> -#define        AT91_WDT_WDD        (0xfff << 16)        /* Delta 
> >> Value */
> >> -#define            AT91_WDT_SET_WDD(x)    (((x) << 16) & AT91_WDT_WDD)
> >> -#define        AT91_WDT_WDDBGHLT    (1     << 28)        /* Debug 
> >> Halt */
> >> -#define        AT91_WDT_WDIDLEHLT    (1     << 29)        /* Idle 
> >> Halt */
> >> +#define  AT91_WDT_WDV        (0xfff << 0)        /* Counter Value */
> >> +#define  AT91_WDT_SET_WDV(x)    ((x) & AT91_WDT_WDV)
> >> +#define  AT91_WDT_WDFIEN    BIT(12)        /* Fault Interrupt Enable */
> >> +#define  AT91_WDT_WDRSTEN    BIT(13)        /* Reset Processor */
> >> +#define  AT91_WDT_WDRPROC    BIT(14)        /* Timer Restart */
> >> +#define  AT91_WDT_WDDIS        BIT(15)        /* Watchdog Disable */
> >> +#define  AT91_WDT_WDD        (0xfff << 16)        /* Delta Value */
> >> +#define  AT91_WDT_SET_WDD(x)    (((x) << 16) & AT91_WDT_WDD)
> >> +#define  AT91_WDT_WDDBGHLT    BIT(28)        /* Debug Halt */
> >> +#define  AT91_WDT_WDIDLEHLT    BIT(29)        /* Idle Halt */
> >> -#define AT91_WDT_SR        0x08            /* Watchdog Status 
> >> Register */
> >> -#define        AT91_WDT_WDUNF        (1 << 0)        /* Watchdog 
> >> Underflow */
> >> -#define        AT91_WDT_WDERR        (1 << 1)        /* Watchdog 
> >> Error */
> >> +#define AT91_WDT_SR        0x08        /* Watchdog Status Register */
> >> +#define  AT91_WDT_WDUNF        BIT(0)        /* Watchdog Underflow */
> >> +#define  AT91_WDT_WDERR        BIT(1)        /* Watchdog Error */
> >>   #endif
> >>
> >