From: Thierry Reding <thierry.reding@gmail.com>
To: Lyude Paul <lyude@redhat.com>
Cc: nouveau@lists.freedesktop.org, Sam Ravnborg <sam@ravnborg.org>,
David Airlie <airlied@linux.ie>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org, Jerry Zuo <Jerry.Zuo@amd.com>,
Sean Paul <seanpaul@chromium.org>,
Ben Skeggs <bskeggs@redhat.com>, Daniel Vetter <daniel@ffwll.ch>,
David Airlie <airlied@redhat.com>,
Harry Wentland <harry.wentland@amd.com>,
Juston Li <juston.li@intel.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Subject: Re: [Nouveau] [PATCH 3/3] drm/nouveau/kms/nv50-: Limit MST BPC to 8
Date: Mon, 18 Nov 2019 14:36:14 +0100 [thread overview]
Message-ID: <20191118133614.GE2246533@ulmo> (raw)
In-Reply-To: <20191115210728.3467-4-lyude@redhat.com>
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On Fri, Nov 15, 2019 at 04:07:20PM -0500, Lyude Paul wrote:
> Noticed this while working on some unrelated CRC stuff. Currently,
> userspace has very little support for BPCs higher than 8. While this
> doesn't matter for most things, on MST topologies we need to be careful
> about ensuring that we do our best to make any given display
> configuration fit within the bandwidth restraints of the topology, since
> otherwise less people's monitor configurations will work.
>
> Allowing for BPC settings higher than 8 dramatically increases the
> required bandwidth for displays in most configurations, and consequently
> makes it a lot less likely that said display configurations will pass
> the atomic check.
>
> In the future we want to fix this correctly by making it so that we
> adjust the bpp for each display in a topology to be as high as possible,
> while making sure to lower the bpp of each display in the event that we
> run out of bandwidth and need to rerun our atomic check. But for now,
> follow the behavior that both i915 and amdgpu are sticking to.
>
> Signed-off-by: Lyude Paul <lyude@redhat.com>
> Fixes: 232c9eec417a ("drm/nouveau: Use atomic VCPI helpers for MST")
> Cc: Ben Skeggs <bskeggs@redhat.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: David Airlie <airlied@redhat.com>
> Cc: Jerry Zuo <Jerry.Zuo@amd.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Juston Li <juston.li@intel.com>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: <stable@vger.kernel.org> # v5.1+
> ---
> drivers/gpu/drm/nouveau/dispnv50/disp.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
Reviewed-by: Thierry Reding <treding@nvidia.com>
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Lyude Paul <lyude@redhat.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
David Airlie <airlied@linux.ie>,
nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org, Jerry Zuo <Jerry.Zuo@amd.com>,
Sean Paul <seanpaul@chromium.org>,
dri-devel@lists.freedesktop.org,
David Airlie <airlied@redhat.com>,
Sam Ravnborg <sam@ravnborg.org>, Juston Li <juston.li@intel.com>,
Ben Skeggs <bskeggs@redhat.com>
Subject: Re: [Nouveau] [PATCH 3/3] drm/nouveau/kms/nv50-: Limit MST BPC to 8
Date: Mon, 18 Nov 2019 14:36:14 +0100 [thread overview]
Message-ID: <20191118133614.GE2246533@ulmo> (raw)
Message-ID: <20191118133614.gO5IMutcJ-lv1e-EC-G2WmLyTJDVQpydFKV5KQo_uuE@z> (raw)
In-Reply-To: <20191115210728.3467-4-lyude@redhat.com>
[-- Attachment #1.1: Type: text/plain, Size: 1749 bytes --]
On Fri, Nov 15, 2019 at 04:07:20PM -0500, Lyude Paul wrote:
> Noticed this while working on some unrelated CRC stuff. Currently,
> userspace has very little support for BPCs higher than 8. While this
> doesn't matter for most things, on MST topologies we need to be careful
> about ensuring that we do our best to make any given display
> configuration fit within the bandwidth restraints of the topology, since
> otherwise less people's monitor configurations will work.
>
> Allowing for BPC settings higher than 8 dramatically increases the
> required bandwidth for displays in most configurations, and consequently
> makes it a lot less likely that said display configurations will pass
> the atomic check.
>
> In the future we want to fix this correctly by making it so that we
> adjust the bpp for each display in a topology to be as high as possible,
> while making sure to lower the bpp of each display in the event that we
> run out of bandwidth and need to rerun our atomic check. But for now,
> follow the behavior that both i915 and amdgpu are sticking to.
>
> Signed-off-by: Lyude Paul <lyude@redhat.com>
> Fixes: 232c9eec417a ("drm/nouveau: Use atomic VCPI helpers for MST")
> Cc: Ben Skeggs <bskeggs@redhat.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: David Airlie <airlied@redhat.com>
> Cc: Jerry Zuo <Jerry.Zuo@amd.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Juston Li <juston.li@intel.com>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> Cc: Sean Paul <seanpaul@chromium.org>
> Cc: <stable@vger.kernel.org> # v5.1+
> ---
> drivers/gpu/drm/nouveau/dispnv50/disp.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
Reviewed-by: Thierry Reding <treding@nvidia.com>
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next prev parent reply other threads:[~2019-11-18 13:36 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-15 21:07 [PATCH 0/3] MST BPC fixes for nouveau Lyude Paul
2019-11-15 21:07 ` Lyude Paul
2019-11-15 21:07 ` [PATCH 1/3] drm/nouveau/kms/nv50-: Call outp_atomic_check_view() before handling PBN Lyude Paul
2019-11-15 21:07 ` Lyude Paul
2019-11-18 13:41 ` [Nouveau] " Thierry Reding
2019-11-18 13:41 ` Thierry Reding
2019-11-15 21:07 ` [PATCH 2/3] drm/nouveau/kms/nv50-: Store the bpc we're using in nv50_head_atom Lyude Paul
2019-11-15 21:07 ` Lyude Paul
2019-11-18 13:35 ` [Nouveau] " Thierry Reding
2019-11-18 13:35 ` Thierry Reding
2019-11-15 21:07 ` [PATCH 3/3] drm/nouveau/kms/nv50-: Limit MST BPC to 8 Lyude Paul
2019-11-15 21:07 ` Lyude Paul
2019-11-18 13:36 ` Thierry Reding [this message]
2019-11-18 13:36 ` [Nouveau] " Thierry Reding
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