Re: [PATCH] drm/dsc: Return unsigned long on compute offset

["Ville Syrjälä" <ville.syrjala-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>]

On Tue, Nov 19, 2019 at 04:59:40PM +0000, Cornij, Nikola wrote:
> If you're going to make all of them the same, then u64, please.
> 
> This is because I'm not sure if calculations require 64-bit at some stage.

If it does then it's already broken. Someone should probably figure out
what's actally needed instead of shooting ducks with an icbm.

> 
> -----Original Message-----
> From: Lipski, Mikita <Mikita.Lipski@amd.com> 
> Sent: November 19, 2019 10:08 AM
> To: Ville Syrjälä <ville.syrjala@linux.intel.com>; Lipski, Mikita <Mikita.Lipski@amd.com>
> Cc: amd-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Cornij, Nikola <Nikola.Cornij@amd.com>
> Subject: Re: [PATCH] drm/dsc: Return unsigned long on compute offset
> 
> 
> 
> On 19/11/2019 09:56, Ville Syrjälä wrote:
> > On Tue, Nov 19, 2019 at 09:45:26AM -0500, mikita.lipski@amd.com wrote:
> >> From: Mikita Lipski <mikita.lipski@amd.com>
> >>
> >> We shouldn't compare int with unsigned long to find the max value and 
> >> since we are not expecting negative value returned from 
> >> compute_offset we should make this function return unsigned long so 
> >> we can compare the values when computing rc parameters.
> > 
> > Why are there other unsigned longs in dsc parameter computation in the 
> > first place?
> 
> I believe it was initially set to be unsigned long for variable consistency, when we ported intel_compute_rc_parameters into drm_dsc_compute_rc_parameters. But now that I look at it, we can actually just set them to u32 or u64, as nothing should exceed that.
> > 
> >>
> >> Cc: Nikola Cornij <nikola.cornij@amd.com>
> >> Cc: Harry Wentland <harry.wentland@amd.com>
> >> Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
> >> ---
> >>   drivers/gpu/drm/drm_dsc.c | 6 +++---
> >>   1 file changed, 3 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c
> >> index 74f3527f567d..ec40604ab6a2 100644
> >> --- a/drivers/gpu/drm/drm_dsc.c
> >> +++ b/drivers/gpu/drm/drm_dsc.c
> >> @@ -245,11 +245,11 @@ void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload,
> >>   }
> >>   EXPORT_SYMBOL(drm_dsc_pps_payload_pack);
> >>   
> >> -static int compute_offset(struct drm_dsc_config *vdsc_cfg, int pixels_per_group,
> >> +static unsigned long compute_offset(struct drm_dsc_config *vdsc_cfg, int pixels_per_group,
> >>   				int groups_per_line, int grpcnt)
> >>   {
> >> -	int offset = 0;
> >> -	int grpcnt_id = DIV_ROUND_UP(vdsc_cfg->initial_xmit_delay, pixels_per_group);
> >> +	unsigned long offset = 0;
> >> +	unsigned long grpcnt_id = DIV_ROUND_UP(vdsc_cfg->initial_xmit_delay, pixels_per_group);
> >>   
> >>   	if (grpcnt <= grpcnt_id)
> >>   		offset = DIV_ROUND_UP(grpcnt * pixels_per_group * vdsc_cfg->bits_per_pixel, 16);
> >> -- 
> >> 2.17.1
> >>
> >> _______________________________________________
> >> dri-devel mailing list
> >> dri-devel@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/dri-devel
> > 
> 
> -- 
> Thanks,
> Mikita Lipski
> Software Engineer 2, AMD
> mikita.lipski@amd.com

-- 
Ville Syrjälä
Intel
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