From: "Clément Péron" <peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: "Thierry Reding"
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"Uwe Kleine-König"
<u.kleine-koenig-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"Maxime Ripard" <mripard-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"Chen-Yu Tsai" <wens-jdAy2FN1RRM@public.gmane.org>,
"Philipp Zabel" <pza-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
"Jernej Skrabec" <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>,
"Clément Péron"
<peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: [PATCH v7 4/8] pwm: sun4i: Add an optional probe for bus clock
Date: Tue, 19 Nov 2019 18:53:15 +0100 [thread overview]
Message-ID: <20191119175319.16561-5-peron.clem@gmail.com> (raw)
In-Reply-To: <20191119175319.16561-1-peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
H6 PWM core needs bus clock to be enabled in order to work.
Add an optional probe for it.
Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
Signed-off-by: Clément Péron <peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/pwm/pwm-sun4i.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index 6d97fef4ed43..ce83d479ba0e 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -78,6 +78,7 @@ struct sun4i_pwm_data {
struct sun4i_pwm_chip {
struct pwm_chip chip;
+ struct clk *bus_clk;
struct clk *clk;
struct reset_control *rst;
void __iomem *base;
@@ -391,6 +392,14 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
}
}
+ pwm->bus_clk = devm_clk_get_optional(&pdev->dev, "bus");
+ if (IS_ERR(pwm->bus_clk)) {
+ if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "get bus clock failed %pe\n",
+ pwm->bus_clk);
+ return PTR_ERR(pwm->bus_clk);
+ }
+
pwm->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
if (IS_ERR(pwm->rst)) {
if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
@@ -406,6 +415,16 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
return ret;
}
+ /*
+ * We're keeping the bus clock on for the sake of simplicity.
+ * Actually it only needs to be on for hardware register accesses.
+ */
+ ret = clk_prepare_enable(pwm->bus_clk);
+ if (ret) {
+ dev_err(&pdev->dev, "Cannot prepare and enable bus_clk\n");
+ goto err_bus;
+ }
+
pwm->chip.dev = &pdev->dev;
pwm->chip.ops = &sun4i_pwm_ops;
pwm->chip.base = -1;
@@ -426,6 +445,8 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
return 0;
err_pwm_add:
+ clk_disable_unprepare(pwm->bus_clk);
+err_bus:
reset_control_assert(pwm->rst);
return ret;
@@ -440,6 +461,7 @@ static int sun4i_pwm_remove(struct platform_device *pdev)
if (ret)
return ret;
+ clk_disable_unprepare(pwm->bus_clk);
reset_control_assert(pwm->rst);
return 0;
--
2.20.1
--
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WARNING: multiple messages have this Message-ID (diff)
From: "Clément Péron" <peron.clem@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Philipp Zabel" <pza@pengutronix.de>
Cc: linux-pwm@vger.kernel.org,
"Jernej Skrabec" <jernej.skrabec@siol.net>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@googlegroups.com,
"Clément Péron" <peron.clem@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 4/8] pwm: sun4i: Add an optional probe for bus clock
Date: Tue, 19 Nov 2019 18:53:15 +0100 [thread overview]
Message-ID: <20191119175319.16561-5-peron.clem@gmail.com> (raw)
In-Reply-To: <20191119175319.16561-1-peron.clem@gmail.com>
From: Jernej Skrabec <jernej.skrabec@siol.net>
H6 PWM core needs bus clock to be enabled in order to work.
Add an optional probe for it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
drivers/pwm/pwm-sun4i.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index 6d97fef4ed43..ce83d479ba0e 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -78,6 +78,7 @@ struct sun4i_pwm_data {
struct sun4i_pwm_chip {
struct pwm_chip chip;
+ struct clk *bus_clk;
struct clk *clk;
struct reset_control *rst;
void __iomem *base;
@@ -391,6 +392,14 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
}
}
+ pwm->bus_clk = devm_clk_get_optional(&pdev->dev, "bus");
+ if (IS_ERR(pwm->bus_clk)) {
+ if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "get bus clock failed %pe\n",
+ pwm->bus_clk);
+ return PTR_ERR(pwm->bus_clk);
+ }
+
pwm->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
if (IS_ERR(pwm->rst)) {
if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
@@ -406,6 +415,16 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
return ret;
}
+ /*
+ * We're keeping the bus clock on for the sake of simplicity.
+ * Actually it only needs to be on for hardware register accesses.
+ */
+ ret = clk_prepare_enable(pwm->bus_clk);
+ if (ret) {
+ dev_err(&pdev->dev, "Cannot prepare and enable bus_clk\n");
+ goto err_bus;
+ }
+
pwm->chip.dev = &pdev->dev;
pwm->chip.ops = &sun4i_pwm_ops;
pwm->chip.base = -1;
@@ -426,6 +445,8 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
return 0;
err_pwm_add:
+ clk_disable_unprepare(pwm->bus_clk);
+err_bus:
reset_control_assert(pwm->rst);
return ret;
@@ -440,6 +461,7 @@ static int sun4i_pwm_remove(struct platform_device *pdev)
if (ret)
return ret;
+ clk_disable_unprepare(pwm->bus_clk);
reset_control_assert(pwm->rst);
return 0;
--
2.20.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: "Clément Péron" <peron.clem@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Chen-Yu Tsai" <wens@csie.org>,
"Philipp Zabel" <pza@pengutronix.de>
Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
"Jernej Skrabec" <jernej.skrabec@siol.net>,
"Clément Péron" <peron.clem@gmail.com>
Subject: [PATCH v7 4/8] pwm: sun4i: Add an optional probe for bus clock
Date: Tue, 19 Nov 2019 18:53:15 +0100 [thread overview]
Message-ID: <20191119175319.16561-5-peron.clem@gmail.com> (raw)
In-Reply-To: <20191119175319.16561-1-peron.clem@gmail.com>
From: Jernej Skrabec <jernej.skrabec@siol.net>
H6 PWM core needs bus clock to be enabled in order to work.
Add an optional probe for it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
drivers/pwm/pwm-sun4i.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index 6d97fef4ed43..ce83d479ba0e 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -78,6 +78,7 @@ struct sun4i_pwm_data {
struct sun4i_pwm_chip {
struct pwm_chip chip;
+ struct clk *bus_clk;
struct clk *clk;
struct reset_control *rst;
void __iomem *base;
@@ -391,6 +392,14 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
}
}
+ pwm->bus_clk = devm_clk_get_optional(&pdev->dev, "bus");
+ if (IS_ERR(pwm->bus_clk)) {
+ if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "get bus clock failed %pe\n",
+ pwm->bus_clk);
+ return PTR_ERR(pwm->bus_clk);
+ }
+
pwm->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
if (IS_ERR(pwm->rst)) {
if (PTR_ERR(pwm->rst) != -EPROBE_DEFER)
@@ -406,6 +415,16 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
return ret;
}
+ /*
+ * We're keeping the bus clock on for the sake of simplicity.
+ * Actually it only needs to be on for hardware register accesses.
+ */
+ ret = clk_prepare_enable(pwm->bus_clk);
+ if (ret) {
+ dev_err(&pdev->dev, "Cannot prepare and enable bus_clk\n");
+ goto err_bus;
+ }
+
pwm->chip.dev = &pdev->dev;
pwm->chip.ops = &sun4i_pwm_ops;
pwm->chip.base = -1;
@@ -426,6 +445,8 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
return 0;
err_pwm_add:
+ clk_disable_unprepare(pwm->bus_clk);
+err_bus:
reset_control_assert(pwm->rst);
return ret;
@@ -440,6 +461,7 @@ static int sun4i_pwm_remove(struct platform_device *pdev)
if (ret)
return ret;
+ clk_disable_unprepare(pwm->bus_clk);
reset_control_assert(pwm->rst);
return 0;
--
2.20.1
next prev parent reply other threads:[~2019-11-19 17:53 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-19 17:53 [PATCH v7 0/8] Add support for H6 PWM Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
[not found] ` <20191119175319.16561-1-peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-11-19 17:53 ` [PATCH v7 1/8] dt-bindings: pwm: allwinner: Add H6 PWM description Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` [PATCH v7 2/8] pwm: sun4i: Add an optional probe for reset line Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` [PATCH v7 3/8] pwm: sun4i: Prefer "mod" clock to unnamed Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-21 7:26 ` Uwe Kleine-König
2019-11-21 7:26 ` Uwe Kleine-König
2019-11-19 17:53 ` Clément Péron [this message]
2019-11-19 17:53 ` [PATCH v7 4/8] pwm: sun4i: Add an optional probe for bus clock Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-21 7:28 ` Uwe Kleine-König
2019-11-21 7:28 ` Uwe Kleine-König
[not found] ` <20191121072829.vitly7altcvlt4sj-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-11-21 11:14 ` Clément Péron
2019-11-21 11:14 ` Clément Péron
2019-11-21 11:14 ` Clément Péron
2019-11-19 17:53 ` [PATCH v7 5/8] pwm: sun4i: Add support to output source clock directly Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
[not found] ` <20191119175319.16561-6-peron.clem-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-11-21 7:36 ` Uwe Kleine-König
2019-11-21 7:36 ` Uwe Kleine-König
2019-11-21 7:36 ` Uwe Kleine-König
[not found] ` <20191121073647.phutknyb3tzp44ye-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2019-11-21 11:38 ` Clément Péron
2019-11-21 11:38 ` Clément Péron
2019-11-21 11:38 ` Clément Péron
2019-11-19 17:53 ` [PATCH v7 6/8] pwm: sun4i: Add support for H6 PWM Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` [PATCH v7 7/8] arm64: dts: allwinner: h6: Add PWM node Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` [PATCH v7 8/8] [DO NOT MERGE] arm64: allwinner: h6: enable Beelink GS1 PWM Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-19 17:53 ` Clément Péron
2019-11-21 7:24 ` [PATCH v7 0/8] Add support for H6 PWM Maxime Ripard
2019-11-21 7:24 ` Maxime Ripard
[not found] ` <20191121072408.GE4345-2DbqMqoCcjvhXIiyNabO3w@public.gmane.org>
2019-12-10 16:48 ` Rob Herring
2019-12-10 16:48 ` Rob Herring
2019-12-10 16:48 ` Rob Herring
[not found] ` <CAL_JsqJevcG2qv+BYKTnP=out0jPxuEcdYuLq7idxK04Q05fag-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-12-10 17:20 ` Clément Péron
2019-12-10 17:20 ` Clément Péron
2019-12-10 17:20 ` Clément Péron
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