From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: "Liang, Kan" <kan.liang@linux.intel.com>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Ingo Molnar <mingo@kernel.org>,
LKML <linux-kernel@vger.kernel.org>, Jiri Olsa <jolsa@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
vitaly.slobodskoy@intel.com, pavel.gerasimov@intel.com,
Andi Kleen <ak@linux.intel.com>,
Michael Ellerman <mpe@ellerman.id.au>
Subject: Re: [PATCH V4 03/13] perf tools: Support new branch sample type for LBR TOS
Date: Tue, 19 Nov 2019 22:31:24 +0100 [thread overview]
Message-ID: <20191119213124.GO3079@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <CABPqkBSkTgvbz0S_iv-F5DkUKdqA49k_dLtoh0wbE49ePQ6V=A@mail.gmail.com>
On Tue, Nov 19, 2019 at 11:00:00AM -0800, Stephane Eranian wrote:
> On Tue, Nov 19, 2019 at 6:35 AM <kan.liang@linux.intel.com> wrote:
> > diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h
> > index bb7b271397a6..c2da61c9ace7 100644
> > --- a/tools/include/uapi/linux/perf_event.h
> > +++ b/tools/include/uapi/linux/perf_event.h
> > @@ -180,7 +180,10 @@ enum perf_branch_sample_type_shift {
> >
> > PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT = 16, /* save branch type */
> >
> > - PERF_SAMPLE_BRANCH_MAX_SHIFT /* non-ABI */
> > + PERF_SAMPLE_BRANCH_MAX_SHIFT = 17, /* non-ABI */
> > +
> > + /* PMU specific */
>
> No! You must abstract this.
>
> > + PERF_SAMPLE_BRANCH_LBR_TOS_SHIFT = 63, /* save LBR TOS */
> > };
> >
> I don't like this because this is too Intel specific.
> What is the meaning of this field? You need a clear definition so it can be used
> with other PERF_SAMPLE_BRANCH_* implementations.
I also detest the MSB usage. Normal pattern is that any bit >= MAX
will be rejected by the kernel.
next prev parent reply other threads:[~2019-11-19 21:31 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-19 14:33 [PATCH V4 00/13] Stitch LBR call stack kan.liang
2019-11-19 14:33 ` [PATCH V4 01/13] perf/core: Add new branch sample type for LBR TOS kan.liang
2019-11-19 19:02 ` Stephane Eranian
2019-11-19 22:25 ` Liang, Kan
2019-11-19 22:51 ` Stephane Eranian
2019-11-20 15:06 ` Liang, Kan
2019-11-19 14:34 ` [PATCH V4 02/13] perf/x86/intel: Output LBR TOS information kan.liang
2019-11-19 14:34 ` [PATCH V4 03/13] perf tools: Support new branch sample type for LBR TOS kan.liang
2019-11-19 19:00 ` Stephane Eranian
2019-11-19 21:31 ` Peter Zijlstra [this message]
2019-11-19 22:17 ` Liang, Kan
2019-11-19 14:34 ` [PATCH V4 04/13] perf header: Add check for event attr kan.liang
2019-11-19 14:34 ` [PATCH V4 05/13] perf pmu: Add support for PMU capabilities kan.liang
2019-11-19 14:34 ` [PATCH V4 06/13] perf header: Support CPU " kan.liang
2019-11-19 14:34 ` [PATCH V4 07/13] perf machine: Refine the function for LBR call stack reconstruction kan.liang
2019-11-19 14:34 ` [PATCH V4 08/13] perf tools: Stitch LBR call stack kan.liang
2019-11-19 14:34 ` [PATCH V4 09/13] perf report: Add option to enable the LBR stitching approach kan.liang
2019-11-19 14:34 ` [PATCH V4 10/13] perf script: " kan.liang
2019-11-19 14:34 ` [PATCH V4 11/13] perf top: " kan.liang
2019-11-19 14:34 ` [PATCH V4 12/13] perf c2c: " kan.liang
2019-11-19 14:34 ` [RFC PATCH V4 13/13] perf hist: Add fast path for duplicate entries check approach kan.liang
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