* [PATCH 0/2] Wa_1604555607 implementation and verification skip @ 2019-11-20 17:31 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 17:31 UTC (permalink / raw) To: intel-gfx Implements the Wa_1604555607 and skips its verification as the FF_MODES2 register is writeonly till TGL B0. Test-with: 20191120145712.27496-1-ramalingam.c@intel.com Michel Thierry (1): drm/i915/tgl: Implement Wa_1604555607 Ramalingam C (1): drm/i915: Skip the Wa_1604555607 verification drivers/gpu/drm/i915/gt/intel_workarounds.c | 26 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 4 ++++ 2 files changed, 30 insertions(+) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 0/2] Wa_1604555607 implementation and verification skip @ 2019-11-20 17:31 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 17:31 UTC (permalink / raw) To: intel-gfx Implements the Wa_1604555607 and skips its verification as the FF_MODES2 register is writeonly till TGL B0. Test-with: 20191120145712.27496-1-ramalingam.c@intel.com Michel Thierry (1): drm/i915/tgl: Implement Wa_1604555607 Ramalingam C (1): drm/i915: Skip the Wa_1604555607 verification drivers/gpu/drm/i915/gt/intel_workarounds.c | 26 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 4 ++++ 2 files changed, 30 insertions(+) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/2] drm/i915/tgl: Implement Wa_1604555607 @ 2019-11-20 17:31 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 17:31 UTC (permalink / raw) To: intel-gfx; +Cc: Michel Thierry From: Michel Thierry <michel.thierry@intel.com> Implement Wa_1604555607 (set the DS pairing timer to 128 cycles). FF_MODE2 is part of the register state context, that's why it is implemented here. v2: Rebased on top of the WA refactoring (Oscar) v3: Correctly add to ctx_workarounds_init (Michel) v4: uncore read is used [Tvrtko] Macros as used for MASK definition [Chris] BSpec: 19363 HSDES: 1604555607 Signed-off-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Ramalingam C <ramlingam.c@intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 ++++++++ drivers/gpu/drm/i915/i915_reg.h | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 399acae2f33f..93efefa205d6 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -568,9 +568,17 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine, static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) { + u32 val; + /* Wa_1409142259:tgl */ WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3, GEN12_DISABLE_CPS_AWARE_COLOR_PIPE); + + /* Wa_1604555607:tgl */ + val = intel_uncore_read(engine->uncore, FF_MODE2); + val &= ~FF_MODE2_TDS_TIMER_MASK; + val |= FF_MODE2_TDS_TIMER_128; + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); } static void diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 94d0f593eeb7..a99fdf8ea53b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7922,6 +7922,10 @@ enum { #define PIXEL_ROUNDING_TRUNC_FB_PASSTHRU (1 << 15) #define PER_PIXEL_ALPHA_BYPASS_EN (1 << 7) +#define FF_MODE2 _MMIO(0x6604) +#define FF_MODE2_TDS_TIMER_MASK REG_GENMASK(23, 16) +#define FF_MODE2_TDS_TIMER_128 REG_FIELD_PREP(FF_MODE2_TDS_TIMER_MASK, 4) + /* PCH */ #define PCH_DISPLAY_BASE 0xc0000u -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Implement Wa_1604555607 @ 2019-11-20 17:31 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 17:31 UTC (permalink / raw) To: intel-gfx; +Cc: Michel Thierry From: Michel Thierry <michel.thierry@intel.com> Implement Wa_1604555607 (set the DS pairing timer to 128 cycles). FF_MODE2 is part of the register state context, that's why it is implemented here. v2: Rebased on top of the WA refactoring (Oscar) v3: Correctly add to ctx_workarounds_init (Michel) v4: uncore read is used [Tvrtko] Macros as used for MASK definition [Chris] BSpec: 19363 HSDES: 1604555607 Signed-off-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Ramalingam C <ramlingam.c@intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 ++++++++ drivers/gpu/drm/i915/i915_reg.h | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 399acae2f33f..93efefa205d6 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -568,9 +568,17 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine, static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) { + u32 val; + /* Wa_1409142259:tgl */ WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3, GEN12_DISABLE_CPS_AWARE_COLOR_PIPE); + + /* Wa_1604555607:tgl */ + val = intel_uncore_read(engine->uncore, FF_MODE2); + val &= ~FF_MODE2_TDS_TIMER_MASK; + val |= FF_MODE2_TDS_TIMER_128; + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); } static void diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 94d0f593eeb7..a99fdf8ea53b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7922,6 +7922,10 @@ enum { #define PIXEL_ROUNDING_TRUNC_FB_PASSTHRU (1 << 15) #define PER_PIXEL_ALPHA_BYPASS_EN (1 << 7) +#define FF_MODE2 _MMIO(0x6604) +#define FF_MODE2_TDS_TIMER_MASK REG_GENMASK(23, 16) +#define FF_MODE2_TDS_TIMER_128 REG_FIELD_PREP(FF_MODE2_TDS_TIMER_MASK, 4) + /* PCH */ #define PCH_DISPLAY_BASE 0xc0000u -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 17:31 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 17:31 UTC (permalink / raw) To: intel-gfx At TGL A0 stepping, FF_MODE2 register read back is broken, hence disabling the WA verification. Helper function called wa_write_masked_or_no_verify is defined for the same purpose. Signed-off-by: Ramalingam C <ramalingam.c@intel.com> cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 93efefa205d6..1698330c6f23 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, _wa_add(wal, &wa); } +static void +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) +{ + struct i915_wa wa = { + .reg = reg, + .mask = mask, + .val = val, + .read = 0, + }; + + _wa_add(wal, &wa); +} + static void wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) { @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, val = intel_uncore_read(engine->uncore, FF_MODE2); val &= ~FF_MODE2_TDS_TIMER_MASK; val |= FF_MODE2_TDS_TIMER_128; - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); + if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) + wa_write_masked_or_no_verify(wal, FF_MODE2, + FF_MODE2_TDS_TIMER_MASK, val); + else + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); } static void -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 17:31 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 17:31 UTC (permalink / raw) To: intel-gfx At TGL A0 stepping, FF_MODE2 register read back is broken, hence disabling the WA verification. Helper function called wa_write_masked_or_no_verify is defined for the same purpose. Signed-off-by: Ramalingam C <ramalingam.c@intel.com> cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 93efefa205d6..1698330c6f23 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, _wa_add(wal, &wa); } +static void +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) +{ + struct i915_wa wa = { + .reg = reg, + .mask = mask, + .val = val, + .read = 0, + }; + + _wa_add(wal, &wa); +} + static void wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) { @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, val = intel_uncore_read(engine->uncore, FF_MODE2); val &= ~FF_MODE2_TDS_TIMER_MASK; val |= FF_MODE2_TDS_TIMER_128; - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); + if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) + wa_write_masked_or_no_verify(wal, FF_MODE2, + FF_MODE2_TDS_TIMER_MASK, val); + else + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); } static void -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 17:50 ` Tvrtko Ursulin 0 siblings, 0 replies; 22+ messages in thread From: Tvrtko Ursulin @ 2019-11-20 17:50 UTC (permalink / raw) To: Ramalingam C, intel-gfx On 20/11/2019 17:31, Ramalingam C wrote: > At TGL A0 stepping, FF_MODE2 register read back is broken, hence > disabling the WA verification. > > Helper function called wa_write_masked_or_no_verify is defined for the > same purpose. > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- > 1 file changed, 19 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 93efefa205d6..1698330c6f23 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > _wa_add(wal, &wa); > } > > +static void > +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > + u32 val) > +{ > + struct i915_wa wa = { > + .reg = reg, > + .mask = mask, > + .val = val, > + .read = 0, > + }; > + > + _wa_add(wal, &wa); > +} > + > static void > wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) > { > @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > val = intel_uncore_read(engine->uncore, FF_MODE2); > val &= ~FF_MODE2_TDS_TIMER_MASK; > val |= FF_MODE2_TDS_TIMER_128; > - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > + if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) There is engine->i915. > + wa_write_masked_or_no_verify(wal, FF_MODE2, > + FF_MODE2_TDS_TIMER_MASK, val); > + else > + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); You did not think suggested alternative where read mask is directly passed in would work better? It would read a bit more compact: __wa_write_masked_or(..., IS_TGL_REVID(..) ? 0 : val) Up to you what you prefer, I guess the explicit _no_verify brings some self-documenting benefits. Also, do you think there is value in having two patches instead of just squashing into one? I would be tempted to squash. Regards, Tvrtko > } > > static void > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 17:50 ` Tvrtko Ursulin 0 siblings, 0 replies; 22+ messages in thread From: Tvrtko Ursulin @ 2019-11-20 17:50 UTC (permalink / raw) To: Ramalingam C, intel-gfx On 20/11/2019 17:31, Ramalingam C wrote: > At TGL A0 stepping, FF_MODE2 register read back is broken, hence > disabling the WA verification. > > Helper function called wa_write_masked_or_no_verify is defined for the > same purpose. > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- > 1 file changed, 19 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 93efefa205d6..1698330c6f23 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > _wa_add(wal, &wa); > } > > +static void > +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > + u32 val) > +{ > + struct i915_wa wa = { > + .reg = reg, > + .mask = mask, > + .val = val, > + .read = 0, > + }; > + > + _wa_add(wal, &wa); > +} > + > static void > wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) > { > @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > val = intel_uncore_read(engine->uncore, FF_MODE2); > val &= ~FF_MODE2_TDS_TIMER_MASK; > val |= FF_MODE2_TDS_TIMER_128; > - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > + if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) There is engine->i915. > + wa_write_masked_or_no_verify(wal, FF_MODE2, > + FF_MODE2_TDS_TIMER_MASK, val); > + else > + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); You did not think suggested alternative where read mask is directly passed in would work better? It would read a bit more compact: __wa_write_masked_or(..., IS_TGL_REVID(..) ? 0 : val) Up to you what you prefer, I guess the explicit _no_verify brings some self-documenting benefits. Also, do you think there is value in having two patches instead of just squashing into one? I would be tempted to squash. Regards, Tvrtko > } > > static void > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 17:58 ` Lucas De Marchi 0 siblings, 0 replies; 22+ messages in thread From: Lucas De Marchi @ 2019-11-20 17:58 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: intel-gfx On Wed, Nov 20, 2019 at 05:50:51PM +0000, Tvrtko Ursulin wrote: > >On 20/11/2019 17:31, Ramalingam C wrote: >>At TGL A0 stepping, FF_MODE2 register read back is broken, hence >>disabling the WA verification. >> >>Helper function called wa_write_masked_or_no_verify is defined for the >>same purpose. >> >>Signed-off-by: Ramalingam C <ramalingam.c@intel.com> >>cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> >>--- >> drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- >> 1 file changed, 19 insertions(+), 1 deletion(-) >> >>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c >>index 93efefa205d6..1698330c6f23 100644 >>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c >>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c >>@@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, >> _wa_add(wal, &wa); >> } >>+static void >>+wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, >>+ u32 val) >>+{ >>+ struct i915_wa wa = { >>+ .reg = reg, >>+ .mask = mask, >>+ .val = val, >>+ .read = 0, >>+ }; >>+ >>+ _wa_add(wal, &wa); >>+} >>+ >> static void >> wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) >> { >>@@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, >> val = intel_uncore_read(engine->uncore, FF_MODE2); >> val &= ~FF_MODE2_TDS_TIMER_MASK; >> val |= FF_MODE2_TDS_TIMER_128; >>- wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); >>+ if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) > >There is engine->i915. > >>+ wa_write_masked_or_no_verify(wal, FF_MODE2, >>+ FF_MODE2_TDS_TIMER_MASK, val); >>+ else >>+ wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > >You did not think suggested alternative where read mask is directly >passed in would work better? It would read a bit more compact: > > __wa_write_masked_or(..., IS_TGL_REVID(..) ? 0 : val) > >Up to you what you prefer, I guess the explicit _no_verify brings some >self-documenting benefits. > >Also, do you think there is value in having two patches instead of >just squashing into one? I would be tempted to squash. yep, either squash or reorder the patches (the first one being about the helper only) so we don't have a broken behavior in this point of the branch. Lucas De Marchi > >Regards, > >Tvrtko > >> } >> static void >> >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 17:58 ` Lucas De Marchi 0 siblings, 0 replies; 22+ messages in thread From: Lucas De Marchi @ 2019-11-20 17:58 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: intel-gfx On Wed, Nov 20, 2019 at 05:50:51PM +0000, Tvrtko Ursulin wrote: > >On 20/11/2019 17:31, Ramalingam C wrote: >>At TGL A0 stepping, FF_MODE2 register read back is broken, hence >>disabling the WA verification. >> >>Helper function called wa_write_masked_or_no_verify is defined for the >>same purpose. >> >>Signed-off-by: Ramalingam C <ramalingam.c@intel.com> >>cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> >>--- >> drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- >> 1 file changed, 19 insertions(+), 1 deletion(-) >> >>diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c >>index 93efefa205d6..1698330c6f23 100644 >>--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c >>+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c >>@@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, >> _wa_add(wal, &wa); >> } >>+static void >>+wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, >>+ u32 val) >>+{ >>+ struct i915_wa wa = { >>+ .reg = reg, >>+ .mask = mask, >>+ .val = val, >>+ .read = 0, >>+ }; >>+ >>+ _wa_add(wal, &wa); >>+} >>+ >> static void >> wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) >> { >>@@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, >> val = intel_uncore_read(engine->uncore, FF_MODE2); >> val &= ~FF_MODE2_TDS_TIMER_MASK; >> val |= FF_MODE2_TDS_TIMER_128; >>- wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); >>+ if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) > >There is engine->i915. > >>+ wa_write_masked_or_no_verify(wal, FF_MODE2, >>+ FF_MODE2_TDS_TIMER_MASK, val); >>+ else >>+ wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > >You did not think suggested alternative where read mask is directly >passed in would work better? It would read a bit more compact: > > __wa_write_masked_or(..., IS_TGL_REVID(..) ? 0 : val) > >Up to you what you prefer, I guess the explicit _no_verify brings some >self-documenting benefits. > >Also, do you think there is value in having two patches instead of >just squashing into one? I would be tempted to squash. yep, either squash or reorder the patches (the first one being about the helper only) so we don't have a broken behavior in this point of the branch. Lucas De Marchi > >Regards, > >Tvrtko > >> } >> static void >> >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 18:05 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 18:05 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: intel-gfx On 2019-11-20 at 17:50:51 +0000, Tvrtko Ursulin wrote: > > On 20/11/2019 17:31, Ramalingam C wrote: > > At TGL A0 stepping, FF_MODE2 register read back is broken, hence > > disabling the WA verification. > > > > Helper function called wa_write_masked_or_no_verify is defined for the > > same purpose. > > > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > > cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > > --- > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- > > 1 file changed, 19 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > > index 93efefa205d6..1698330c6f23 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > > @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > > _wa_add(wal, &wa); > > } > > +static void > > +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > > + u32 val) > > +{ > > + struct i915_wa wa = { > > + .reg = reg, > > + .mask = mask, > > + .val = val, > > + .read = 0, > > + }; > > + > > + _wa_add(wal, &wa); > > +} > > + > > static void > > wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) > > { > > @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > > val = intel_uncore_read(engine->uncore, FF_MODE2); > > val &= ~FF_MODE2_TDS_TIMER_MASK; > > val |= FF_MODE2_TDS_TIMER_128; > > - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > > + if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) > > There is engine->i915. sure will use it. > > > + wa_write_masked_or_no_verify(wal, FF_MODE2, > > + FF_MODE2_TDS_TIMER_MASK, val); > > + else > > + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > > You did not think suggested alternative where read mask is directly passed > in would work better? It would read a bit more compact: > > __wa_write_masked_or(..., IS_TGL_REVID(..) ? 0 : val) True bit this will change all callers of the fucntion. more over as you mentioned this this _no_verify is explicit for reader. Hence I prefer thsi wway > > Up to you what you prefer, I guess the explicit _no_verify brings some > self-documenting benefits. > > Also, do you think there is value in having two patches instead of just > squashing into one? I would be tempted to squash. I would prefer to have it splitted as this non readability this register is temparary. keeping it separate will indicate we need to fix it in later stepping. Suggest me if you feel other way around. -Ram > > Regards, > > Tvrtko > > > } > > static void > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-20 18:05 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-20 18:05 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: intel-gfx On 2019-11-20 at 17:50:51 +0000, Tvrtko Ursulin wrote: > > On 20/11/2019 17:31, Ramalingam C wrote: > > At TGL A0 stepping, FF_MODE2 register read back is broken, hence > > disabling the WA verification. > > > > Helper function called wa_write_masked_or_no_verify is defined for the > > same purpose. > > > > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > > cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > > --- > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- > > 1 file changed, 19 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > > index 93efefa205d6..1698330c6f23 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > > @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > > _wa_add(wal, &wa); > > } > > +static void > > +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, > > + u32 val) > > +{ > > + struct i915_wa wa = { > > + .reg = reg, > > + .mask = mask, > > + .val = val, > > + .read = 0, > > + }; > > + > > + _wa_add(wal, &wa); > > +} > > + > > static void > > wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) > > { > > @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > > val = intel_uncore_read(engine->uncore, FF_MODE2); > > val &= ~FF_MODE2_TDS_TIMER_MASK; > > val |= FF_MODE2_TDS_TIMER_128; > > - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > > + if (IS_TGL_REVID(engine->uncore->i915, 0, TGL_REVID_A0)) > > There is engine->i915. sure will use it. > > > + wa_write_masked_or_no_verify(wal, FF_MODE2, > > + FF_MODE2_TDS_TIMER_MASK, val); > > + else > > + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); > > You did not think suggested alternative where read mask is directly passed > in would work better? It would read a bit more compact: > > __wa_write_masked_or(..., IS_TGL_REVID(..) ? 0 : val) True bit this will change all callers of the fucntion. more over as you mentioned this this _no_verify is explicit for reader. Hence I prefer thsi wway > > Up to you what you prefer, I guess the explicit _no_verify brings some > self-documenting benefits. > > Also, do you think there is value in having two patches instead of just > squashing into one? I would be tempted to squash. I would prefer to have it splitted as this non readability this register is temparary. keeping it separate will indicate we need to fix it in later stepping. Suggest me if you feel other way around. -Ram > > Regards, > > Tvrtko > > > } > > static void > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-21 5:44 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-21 5:44 UTC (permalink / raw) To: intel-gfx, Tvrtko Ursulin, Chris Wilson At TGL A0 stepping, FF_MODE2 register read back is broken, hence disabling the WA verification. Helper function called wa_write_masked_or_no_verify is defined for the same purpose. v2: i915 ptr retrieved from engine. [Tvrtko] Signed-off-by: Ramalingam C <ramalingam.c@intel.com> cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 93efefa205d6..05086840951b 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, _wa_add(wal, &wa); } +static void +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) +{ + struct i915_wa wa = { + .reg = reg, + .mask = mask, + .val = val, + .read = 0, + }; + + _wa_add(wal, &wa); +} + static void wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) { @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, val = intel_uncore_read(engine->uncore, FF_MODE2); val &= ~FF_MODE2_TDS_TIMER_MASK; val |= FF_MODE2_TDS_TIMER_128; - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); + if (IS_TGL_REVID(engine->i915, 0, TGL_REVID_A0)) + wa_write_masked_or_no_verify(wal, FF_MODE2, + FF_MODE2_TDS_TIMER_MASK, val); + else + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); } static void -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification @ 2019-11-21 5:44 ` Ramalingam C 0 siblings, 0 replies; 22+ messages in thread From: Ramalingam C @ 2019-11-21 5:44 UTC (permalink / raw) To: intel-gfx, Tvrtko Ursulin, Chris Wilson At TGL A0 stepping, FF_MODE2 register read back is broken, hence disabling the WA verification. Helper function called wa_write_masked_or_no_verify is defined for the same purpose. v2: i915 ptr retrieved from engine. [Tvrtko] Signed-off-by: Ramalingam C <ramalingam.c@intel.com> cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 93efefa205d6..05086840951b 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -160,6 +160,20 @@ wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, _wa_add(wal, &wa); } +static void +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) +{ + struct i915_wa wa = { + .reg = reg, + .mask = mask, + .val = val, + .read = 0, + }; + + _wa_add(wal, &wa); +} + static void wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) { @@ -578,7 +592,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, val = intel_uncore_read(engine->uncore, FF_MODE2); val &= ~FF_MODE2_TDS_TIMER_MASK; val |= FF_MODE2_TDS_TIMER_128; - wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); + if (IS_TGL_REVID(engine->i915, 0, TGL_REVID_A0)) + wa_write_masked_or_no_verify(wal, FF_MODE2, + FF_MODE2_TDS_TIMER_MASK, val); + else + wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val); } static void -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 22+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Wa_1604555607 implementation and verification skip (rev2) @ 2019-11-20 23:21 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-20 23:21 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev2) URL : https://patchwork.freedesktop.org/series/69763/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7b2598e9881d drm/i915/tgl: Implement Wa_1604555607 004af1827d3a drm/i915: Skip the Wa_1604555607 verification -:25: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #25: FILE: drivers/gpu/drm/i915/gt/intel_workarounds.c:165: +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) total: 0 errors, 0 warnings, 1 checks, 32 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Wa_1604555607 implementation and verification skip (rev2) @ 2019-11-20 23:21 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-20 23:21 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev2) URL : https://patchwork.freedesktop.org/series/69763/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7b2598e9881d drm/i915/tgl: Implement Wa_1604555607 004af1827d3a drm/i915: Skip the Wa_1604555607 verification -:25: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #25: FILE: drivers/gpu/drm/i915/gt/intel_workarounds.c:165: +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) total: 0 errors, 0 warnings, 1 checks, 32 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Fi.CI.BAT: success for Wa_1604555607 implementation and verification skip (rev2) @ 2019-11-20 23:44 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-20 23:44 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev2) URL : https://patchwork.freedesktop.org/series/69763/ State : success == Summary == CI Bug Log - changes from CI_DRM_7393 -> Patchwork_15353 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/index.html Known issues ------------ Here are the changes found in Patchwork_15353 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_module_load@reload-no-display: - fi-skl-lmem: [PASS][1] -> [DMESG-WARN][2] ([fdo#112261]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7393/fi-skl-lmem/igt@i915_module_load@reload-no-display.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/fi-skl-lmem/igt@i915_module_load@reload-no-display.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#111045] / [fdo#111096]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7393/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: [FAIL][5] ([fdo#103167]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7393/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#109964]: https://bugs.freedesktop.org/show_bug.cgi?id=109964 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#112261]: https://bugs.freedesktop.org/show_bug.cgi?id=112261 [fdo#112298]: https://bugs.freedesktop.org/show_bug.cgi?id=112298 Participating hosts (50 -> 45) ------------------------------ Missing (5): fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5299 -> IGTPW_3734 * Linux: CI_DRM_7393 -> Patchwork_15353 CI-20190529: 20190529 CI_DRM_7393: 0e204eb18baca0cd97950bf936fffdbbce1fd337 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3734: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3734/index.html IGT_5299: 65fed6a79adea14f7bef6d55530da47d7731d370 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15353: 004af1827d3a31d148b37b3604e04aacc27ed8b6 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 004af1827d3a drm/i915: Skip the Wa_1604555607 verification 7b2598e9881d drm/i915/tgl: Implement Wa_1604555607 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Wa_1604555607 implementation and verification skip (rev2) @ 2019-11-20 23:44 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-20 23:44 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev2) URL : https://patchwork.freedesktop.org/series/69763/ State : success == Summary == CI Bug Log - changes from CI_DRM_7393 -> Patchwork_15353 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/index.html Known issues ------------ Here are the changes found in Patchwork_15353 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_module_load@reload-no-display: - fi-skl-lmem: [PASS][1] -> [DMESG-WARN][2] ([fdo#112261]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7393/fi-skl-lmem/igt@i915_module_load@reload-no-display.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/fi-skl-lmem/igt@i915_module_load@reload-no-display.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#111045] / [fdo#111096]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7393/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: [FAIL][5] ([fdo#103167]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7393/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#109964]: https://bugs.freedesktop.org/show_bug.cgi?id=109964 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#112261]: https://bugs.freedesktop.org/show_bug.cgi?id=112261 [fdo#112298]: https://bugs.freedesktop.org/show_bug.cgi?id=112298 Participating hosts (50 -> 45) ------------------------------ Missing (5): fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5299 -> IGTPW_3734 * Linux: CI_DRM_7393 -> Patchwork_15353 CI-20190529: 20190529 CI_DRM_7393: 0e204eb18baca0cd97950bf936fffdbbce1fd337 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3734: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3734/index.html IGT_5299: 65fed6a79adea14f7bef6d55530da47d7731d370 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15353: 004af1827d3a31d148b37b3604e04aacc27ed8b6 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 004af1827d3a drm/i915: Skip the Wa_1604555607 verification 7b2598e9881d drm/i915/tgl: Implement Wa_1604555607 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15353/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Wa_1604555607 implementation and verification skip (rev3) @ 2019-11-21 5:58 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-21 5:58 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev3) URL : https://patchwork.freedesktop.org/series/69763/ State : warning == Summary == $ dim checkpatch origin/drm-tip 915cc6805f08 drm/i915/tgl: Implement Wa_1604555607 d0118d6c3e90 drm/i915: Skip the Wa_1604555607 verification -:28: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #28: FILE: drivers/gpu/drm/i915/gt/intel_workarounds.c:165: +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) total: 0 errors, 0 warnings, 1 checks, 32 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Wa_1604555607 implementation and verification skip (rev3) @ 2019-11-21 5:58 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-21 5:58 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev3) URL : https://patchwork.freedesktop.org/series/69763/ State : warning == Summary == $ dim checkpatch origin/drm-tip 915cc6805f08 drm/i915/tgl: Implement Wa_1604555607 d0118d6c3e90 drm/i915: Skip the Wa_1604555607 verification -:28: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #28: FILE: drivers/gpu/drm/i915/gt/intel_workarounds.c:165: +wa_write_masked_or_no_verify(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) total: 0 errors, 0 warnings, 1 checks, 32 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Fi.CI.BAT: success for Wa_1604555607 implementation and verification skip (rev3) @ 2019-11-21 6:35 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-21 6:35 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev3) URL : https://patchwork.freedesktop.org/series/69763/ State : success == Summary == CI Bug Log - changes from CI_DRM_7395 -> Patchwork_15367 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/index.html Known issues ------------ Here are the changes found in Patchwork_15367 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [PASS][1] -> [FAIL][2] ([fdo#108511]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live_gem_contexts: - fi-bsw-nick: [PASS][3] -> [INCOMPLETE][4] ([fdo# 111542]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html - fi-bsw-kefka: [PASS][5] -> [INCOMPLETE][6] ([fdo# 111542]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-bsw-kefka/igt@i915_selftest@live_gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-bsw-kefka/igt@i915_selftest@live_gem_contexts.html * igt@i915_selftest@live_sanitycheck: - fi-skl-lmem: [PASS][7] -> [DMESG-WARN][8] ([fdo#112261]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html #### Possible fixes #### * igt@i915_selftest@live_execlists: - fi-icl-y: [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-icl-y/igt@i915_selftest@live_execlists.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-icl-y/igt@i915_selftest@live_execlists.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#111880]: https://bugs.freedesktop.org/show_bug.cgi?id=111880 [fdo#111998]: https://bugs.freedesktop.org/show_bug.cgi?id=111998 [fdo#112261]: https://bugs.freedesktop.org/show_bug.cgi?id=112261 Participating hosts (51 -> 45) ------------------------------ Missing (6): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5299 -> IGTPW_3734 * Linux: CI_DRM_7395 -> Patchwork_15367 CI-20190529: 20190529 CI_DRM_7395: 8d3996ceedcd5c64f5a354e9dcc64db4a1f72dd6 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3734: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3734/index.html IGT_5299: 65fed6a79adea14f7bef6d55530da47d7731d370 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15367: d0118d6c3e901d39010ead020d97e2e2d4c841e5 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == d0118d6c3e90 drm/i915: Skip the Wa_1604555607 verification 915cc6805f08 drm/i915/tgl: Implement Wa_1604555607 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Wa_1604555607 implementation and verification skip (rev3) @ 2019-11-21 6:35 ` Patchwork 0 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2019-11-21 6:35 UTC (permalink / raw) To: Ramalingam C; +Cc: intel-gfx == Series Details == Series: Wa_1604555607 implementation and verification skip (rev3) URL : https://patchwork.freedesktop.org/series/69763/ State : success == Summary == CI Bug Log - changes from CI_DRM_7395 -> Patchwork_15367 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/index.html Known issues ------------ Here are the changes found in Patchwork_15367 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_pm_rpm@module-reload: - fi-skl-6770hq: [PASS][1] -> [FAIL][2] ([fdo#108511]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live_gem_contexts: - fi-bsw-nick: [PASS][3] -> [INCOMPLETE][4] ([fdo# 111542]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html - fi-bsw-kefka: [PASS][5] -> [INCOMPLETE][6] ([fdo# 111542]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-bsw-kefka/igt@i915_selftest@live_gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-bsw-kefka/igt@i915_selftest@live_gem_contexts.html * igt@i915_selftest@live_sanitycheck: - fi-skl-lmem: [PASS][7] -> [DMESG-WARN][8] ([fdo#112261]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-skl-lmem/igt@i915_selftest@live_sanitycheck.html #### Possible fixes #### * igt@i915_selftest@live_execlists: - fi-icl-y: [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7395/fi-icl-y/igt@i915_selftest@live_execlists.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/fi-icl-y/igt@i915_selftest@live_execlists.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511 [fdo#111880]: https://bugs.freedesktop.org/show_bug.cgi?id=111880 [fdo#111998]: https://bugs.freedesktop.org/show_bug.cgi?id=111998 [fdo#112261]: https://bugs.freedesktop.org/show_bug.cgi?id=112261 Participating hosts (51 -> 45) ------------------------------ Missing (6): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * IGT: IGT_5299 -> IGTPW_3734 * Linux: CI_DRM_7395 -> Patchwork_15367 CI-20190529: 20190529 CI_DRM_7395: 8d3996ceedcd5c64f5a354e9dcc64db4a1f72dd6 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_3734: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3734/index.html IGT_5299: 65fed6a79adea14f7bef6d55530da47d7731d370 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15367: d0118d6c3e901d39010ead020d97e2e2d4c841e5 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == d0118d6c3e90 drm/i915: Skip the Wa_1604555607 verification 915cc6805f08 drm/i915/tgl: Implement Wa_1604555607 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15367/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2019-11-21 6:35 UTC | newest] Thread overview: 22+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2019-11-20 17:31 [PATCH 0/2] Wa_1604555607 implementation and verification skip Ramalingam C 2019-11-20 17:31 ` [Intel-gfx] " Ramalingam C 2019-11-20 17:31 ` [PATCH 1/2] drm/i915/tgl: Implement Wa_1604555607 Ramalingam C 2019-11-20 17:31 ` [Intel-gfx] " Ramalingam C 2019-11-20 17:31 ` [PATCH 2/2] drm/i915: Skip the Wa_1604555607 verification Ramalingam C 2019-11-20 17:31 ` [Intel-gfx] " Ramalingam C 2019-11-20 17:50 ` Tvrtko Ursulin 2019-11-20 17:50 ` [Intel-gfx] " Tvrtko Ursulin 2019-11-20 17:58 ` Lucas De Marchi 2019-11-20 17:58 ` [Intel-gfx] " Lucas De Marchi 2019-11-20 18:05 ` Ramalingam C 2019-11-20 18:05 ` [Intel-gfx] " Ramalingam C 2019-11-21 5:44 ` Ramalingam C 2019-11-21 5:44 ` [Intel-gfx] " Ramalingam C 2019-11-20 23:21 ` ✗ Fi.CI.CHECKPATCH: warning for Wa_1604555607 implementation and verification skip (rev2) Patchwork 2019-11-20 23:21 ` [Intel-gfx] " Patchwork 2019-11-20 23:44 ` ✓ Fi.CI.BAT: success " Patchwork 2019-11-20 23:44 ` [Intel-gfx] " Patchwork 2019-11-21 5:58 ` ✗ Fi.CI.CHECKPATCH: warning for Wa_1604555607 implementation and verification skip (rev3) Patchwork 2019-11-21 5:58 ` [Intel-gfx] " Patchwork 2019-11-21 6:35 ` ✓ Fi.CI.BAT: success " Patchwork 2019-11-21 6:35 ` [Intel-gfx] " Patchwork
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