From: Shawn Guo <shawnguo@kernel.org>
To: Michael Walle <michael@walle.cc>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Li Yang <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: ls1028a: fix reboot node
Date: Mon, 9 Dec 2019 11:47:23 +0800 [thread overview]
Message-ID: <20191209034722.GZ3365@dragon> (raw)
In-Reply-To: <20191123000709.13162-1-michael@walle.cc>
On Sat, Nov 23, 2019 at 01:07:09AM +0100, Michael Walle wrote:
> The reboot register isn't located inside the DCFG controller, but in its
> own RST controller. Fix it.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 72b9a75976a1..dc75534a4754 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -102,7 +102,7 @@
>
> reboot {
> compatible ="syscon-reboot";
> - regmap = <&dcfg>;
> + regmap = <&rst>;
> offset = <0xb0>;
> mask = <0x02>;
> };
> @@ -161,6 +161,12 @@
> big-endian;
> };
>
> + rst: syscon@1e60000 {
> + compatible = "fsl,ls1028a-rst", "syscon";
Compatible "fsl,ls1028a-rst" seems undocumented?
Shawn
> + reg = <0x0 0x1e60000 0x0 0x10000>;
> + little-endian;
> + };
> +
> scfg: syscon@1fc0000 {
> compatible = "fsl,ls1028a-scfg", "syscon";
> reg = <0x0 0x1fc0000 0x0 0x10000>;
> --
> 2.20.1
>
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WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Michael Walle <michael@walle.cc>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Li Yang <leoyang.li@nxp.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH] arm64: dts: ls1028a: fix reboot node
Date: Mon, 9 Dec 2019 11:47:23 +0800 [thread overview]
Message-ID: <20191209034722.GZ3365@dragon> (raw)
In-Reply-To: <20191123000709.13162-1-michael@walle.cc>
On Sat, Nov 23, 2019 at 01:07:09AM +0100, Michael Walle wrote:
> The reboot register isn't located inside the DCFG controller, but in its
> own RST controller. Fix it.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 72b9a75976a1..dc75534a4754 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -102,7 +102,7 @@
>
> reboot {
> compatible ="syscon-reboot";
> - regmap = <&dcfg>;
> + regmap = <&rst>;
> offset = <0xb0>;
> mask = <0x02>;
> };
> @@ -161,6 +161,12 @@
> big-endian;
> };
>
> + rst: syscon@1e60000 {
> + compatible = "fsl,ls1028a-rst", "syscon";
Compatible "fsl,ls1028a-rst" seems undocumented?
Shawn
> + reg = <0x0 0x1e60000 0x0 0x10000>;
> + little-endian;
> + };
> +
> scfg: syscon@1fc0000 {
> compatible = "fsl,ls1028a-scfg", "syscon";
> reg = <0x0 0x1fc0000 0x0 0x10000>;
> --
> 2.20.1
>
next prev parent reply other threads:[~2019-12-09 3:47 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-23 0:07 [PATCH] arm64: dts: ls1028a: fix reboot node Michael Walle
2019-11-23 0:07 ` Michael Walle
2019-12-09 3:46 ` Shawn Guo
2019-12-09 3:46 ` Shawn Guo
2019-12-09 3:47 ` Shawn Guo [this message]
2019-12-09 3:47 ` Shawn Guo
2019-12-09 9:02 ` Michael Walle
2019-12-09 9:02 ` Michael Walle
2019-12-11 2:17 ` Shawn Guo
2019-12-11 2:17 ` Shawn Guo
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