All of lore.kernel.org
 help / color / mirror / Atom feed
From: Arnd Bergmann <arnd@arndb.de>
To: Piotr Sroka <piotrs@cadence.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>
Cc: kbuild test robot <lkp@intel.com>, Arnd Bergmann <arnd@arndb.de>,
	YueHaibing <yuehaibing@huawei.com>,
	linux-kernel@vger.kernel.org, Julia Lawall <julia.lawall@lip6.fr>,
	linux-mtd@lists.infradead.org
Subject: [PATCH] mtd: rawnand: cadence: fix address space mixup
Date: Tue, 10 Dec 2019 20:59:55 +0100	[thread overview]
Message-ID: <20191210200014.949529-1-arnd@arndb.de> (raw)

dma_addr_t and pointers can are not interchangeable, and can
be different sizes:

drivers/mtd/nand/raw/cadence-nand-controller.c: In function 'cadence_nand_cdma_transfer':
drivers/mtd/nand/raw/cadence-nand-controller.c:1283:12: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
            (void *)dma_buf, (void *)dma_ctrl_dat,
            ^
drivers/mtd/nand/raw/cadence-nand-controller.c:1283:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
            (void *)dma_buf, (void *)dma_ctrl_dat,
                             ^

Use dma_addr_t consistently here, which cleans up a couple of casts
as a side-effect.

Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 .../mtd/nand/raw/cadence-nand-controller.c    | 21 ++++++++-----------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
index 3a36285a8d8a..5a2d7e7ffaee 100644
--- a/drivers/mtd/nand/raw/cadence-nand-controller.c
+++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
@@ -402,7 +402,7 @@ struct cadence_nand_cdma_desc {
 	u16 rsvd2;
 
 	/* System/host memory address required for data DMA commands. */
-	u64 memory_pointer;
+	u64 memory_addr;
 
 	/* Status of operation. */
 	u32 status;
@@ -416,7 +416,7 @@ struct cadence_nand_cdma_desc {
 	u32 rsvd4;
 
 	/* Control data pointer. */
-	u64 ctrl_data_ptr;
+	u64 ctrl_data_addr;
 };
 
 /* Interrupt status. */
@@ -914,8 +914,8 @@ static void cadence_nand_get_caps(struct cdns_nand_ctrl *cdns_ctrl)
 /* Prepare CDMA descriptor. */
 static void
 cadence_nand_cdma_desc_prepare(struct cdns_nand_ctrl *cdns_ctrl,
-			       char nf_mem, u32 flash_ptr, char *mem_ptr,
-			       char *ctrl_data_ptr, u16 ctype)
+			       char nf_mem, u32 flash_ptr, dma_addr_t mem_addr,
+			       dma_addr_t ctrl_data_addr, u16 ctype)
 {
 	struct cadence_nand_cdma_desc *cdma_desc = cdns_ctrl->cdma_desc;
 
@@ -931,13 +931,13 @@ cadence_nand_cdma_desc_prepare(struct cdns_nand_ctrl *cdns_ctrl,
 	cdma_desc->command_flags |= CDMA_CF_DMA_MASTER;
 	cdma_desc->command_flags  |= CDMA_CF_INT;
 
-	cdma_desc->memory_pointer = (uintptr_t)mem_ptr;
+	cdma_desc->memory_addr = mem_addr;
 	cdma_desc->status = 0;
 	cdma_desc->sync_flag_pointer = 0;
 	cdma_desc->sync_arguments = 0;
 
 	cdma_desc->command_type = ctype;
-	cdma_desc->ctrl_data_ptr = (uintptr_t)ctrl_data_ptr;
+	cdma_desc->ctrl_data_addr = ctrl_data_addr;
 }
 
 static u8 cadence_nand_check_desc_error(struct cdns_nand_ctrl *cdns_ctrl,
@@ -1280,8 +1280,7 @@ cadence_nand_cdma_transfer(struct cdns_nand_ctrl *cdns_ctrl, u8 chip_nr,
 	}
 
 	cadence_nand_cdma_desc_prepare(cdns_ctrl, chip_nr, page,
-				       (void *)dma_buf, (void *)dma_ctrl_dat,
-				       ctype);
+				       dma_buf, dma_ctrl_dat, ctype);
 
 	status = cadence_nand_cdma_send_and_wait(cdns_ctrl, thread_nr);
 
@@ -1358,10 +1357,8 @@ static int cadence_nand_erase(struct nand_chip *chip, u32 page)
 	int status;
 	u8 thread_nr = cdns_chip->cs[chip->cur_cs];
 
-	cadence_nand_cdma_desc_prepare(cdns_ctrl,
-				       cdns_chip->cs[chip->cur_cs],
-				       page, NULL, NULL,
-				       CDMA_CT_ERASE);
+	cadence_nand_cdma_desc_prepare(cdns_ctrl, cdns_chip->cs[chip->cur_cs],
+				       page, 0, 0, CDMA_CT_ERASE);
 	status = cadence_nand_cdma_send_and_wait(cdns_ctrl, thread_nr);
 	if (status) {
 		dev_err(cdns_ctrl->dev, "erase operation failed\n");
-- 
2.20.0


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd@arndb.de>
To: Piotr Sroka <piotrs@cadence.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>
Cc: Arnd Bergmann <arnd@arndb.de>, kbuild test robot <lkp@intel.com>,
	Julia Lawall <julia.lawall@lip6.fr>,
	YueHaibing <yuehaibing@huawei.com>,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH] mtd: rawnand: cadence: fix address space mixup
Date: Tue, 10 Dec 2019 20:59:55 +0100	[thread overview]
Message-ID: <20191210200014.949529-1-arnd@arndb.de> (raw)

dma_addr_t and pointers can are not interchangeable, and can
be different sizes:

drivers/mtd/nand/raw/cadence-nand-controller.c: In function 'cadence_nand_cdma_transfer':
drivers/mtd/nand/raw/cadence-nand-controller.c:1283:12: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
            (void *)dma_buf, (void *)dma_ctrl_dat,
            ^
drivers/mtd/nand/raw/cadence-nand-controller.c:1283:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
            (void *)dma_buf, (void *)dma_ctrl_dat,
                             ^

Use dma_addr_t consistently here, which cleans up a couple of casts
as a side-effect.

Fixes: ec4ba01e894d ("mtd: rawnand: Add new Cadence NAND driver to MTD subsystem")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 .../mtd/nand/raw/cadence-nand-controller.c    | 21 ++++++++-----------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
index 3a36285a8d8a..5a2d7e7ffaee 100644
--- a/drivers/mtd/nand/raw/cadence-nand-controller.c
+++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
@@ -402,7 +402,7 @@ struct cadence_nand_cdma_desc {
 	u16 rsvd2;
 
 	/* System/host memory address required for data DMA commands. */
-	u64 memory_pointer;
+	u64 memory_addr;
 
 	/* Status of operation. */
 	u32 status;
@@ -416,7 +416,7 @@ struct cadence_nand_cdma_desc {
 	u32 rsvd4;
 
 	/* Control data pointer. */
-	u64 ctrl_data_ptr;
+	u64 ctrl_data_addr;
 };
 
 /* Interrupt status. */
@@ -914,8 +914,8 @@ static void cadence_nand_get_caps(struct cdns_nand_ctrl *cdns_ctrl)
 /* Prepare CDMA descriptor. */
 static void
 cadence_nand_cdma_desc_prepare(struct cdns_nand_ctrl *cdns_ctrl,
-			       char nf_mem, u32 flash_ptr, char *mem_ptr,
-			       char *ctrl_data_ptr, u16 ctype)
+			       char nf_mem, u32 flash_ptr, dma_addr_t mem_addr,
+			       dma_addr_t ctrl_data_addr, u16 ctype)
 {
 	struct cadence_nand_cdma_desc *cdma_desc = cdns_ctrl->cdma_desc;
 
@@ -931,13 +931,13 @@ cadence_nand_cdma_desc_prepare(struct cdns_nand_ctrl *cdns_ctrl,
 	cdma_desc->command_flags |= CDMA_CF_DMA_MASTER;
 	cdma_desc->command_flags  |= CDMA_CF_INT;
 
-	cdma_desc->memory_pointer = (uintptr_t)mem_ptr;
+	cdma_desc->memory_addr = mem_addr;
 	cdma_desc->status = 0;
 	cdma_desc->sync_flag_pointer = 0;
 	cdma_desc->sync_arguments = 0;
 
 	cdma_desc->command_type = ctype;
-	cdma_desc->ctrl_data_ptr = (uintptr_t)ctrl_data_ptr;
+	cdma_desc->ctrl_data_addr = ctrl_data_addr;
 }
 
 static u8 cadence_nand_check_desc_error(struct cdns_nand_ctrl *cdns_ctrl,
@@ -1280,8 +1280,7 @@ cadence_nand_cdma_transfer(struct cdns_nand_ctrl *cdns_ctrl, u8 chip_nr,
 	}
 
 	cadence_nand_cdma_desc_prepare(cdns_ctrl, chip_nr, page,
-				       (void *)dma_buf, (void *)dma_ctrl_dat,
-				       ctype);
+				       dma_buf, dma_ctrl_dat, ctype);
 
 	status = cadence_nand_cdma_send_and_wait(cdns_ctrl, thread_nr);
 
@@ -1358,10 +1357,8 @@ static int cadence_nand_erase(struct nand_chip *chip, u32 page)
 	int status;
 	u8 thread_nr = cdns_chip->cs[chip->cur_cs];
 
-	cadence_nand_cdma_desc_prepare(cdns_ctrl,
-				       cdns_chip->cs[chip->cur_cs],
-				       page, NULL, NULL,
-				       CDMA_CT_ERASE);
+	cadence_nand_cdma_desc_prepare(cdns_ctrl, cdns_chip->cs[chip->cur_cs],
+				       page, 0, 0, CDMA_CT_ERASE);
 	status = cadence_nand_cdma_send_and_wait(cdns_ctrl, thread_nr);
 	if (status) {
 		dev_err(cdns_ctrl->dev, "erase operation failed\n");
-- 
2.20.0


             reply	other threads:[~2019-12-10 20:02 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-10 19:59 Arnd Bergmann [this message]
2019-12-10 19:59 ` [PATCH] mtd: rawnand: cadence: fix address space mixup Arnd Bergmann
2020-01-09 19:21 ` Miquel Raynal
2020-01-09 19:21   ` Miquel Raynal
2020-01-09 22:19   ` Arnd Bergmann
2020-01-09 22:19     ` Arnd Bergmann

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191210200014.949529-1-arnd@arndb.de \
    --to=arnd@arndb.de \
    --cc=julia.lawall@lip6.fr \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=lkp@intel.com \
    --cc=miquel.raynal@bootlin.com \
    --cc=piotrs@cadence.com \
    --cc=richard@nod.at \
    --cc=vigneshr@ti.com \
    --cc=yuehaibing@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.