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From: Manasi Navare <manasi.d.navare@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [v4.1 07/16] drm/i915/dsc: make DSC source support helper generic
Date: Tue, 10 Dec 2019 15:04:08 -0800	[thread overview]
Message-ID: <20191210230408.GA12192@intel.com> (raw)
In-Reply-To: <6c9f646090913290fb00efd46a4332421bf95930.1575974743.git.jani.nikula@intel.com>

On Tue, Dec 10, 2019 at 12:50:51PM +0200, Jani Nikula wrote:
> Move intel_dp_source_supports_dsc() from intel_dp.c as
> intel_dsc_source_support() in intel_vdsc.c. The DSC source support is
> more about DSC than about DP, and will be needed for DP independent
> code.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Looks good to me

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c   | 27 +++++------------------
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 19 ++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_vdsc.h |  2 ++
>  3 files changed, 26 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f7e618ec6fa3..2f31d226c6eb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1889,32 +1889,15 @@ static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
>  		drm_dp_sink_supports_fec(intel_dp->fec_capable);
>  }
>  
> -static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp,
> -					 const struct intel_crtc_state *pipe_config)
> -{
> -	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -
> -	if (!INTEL_INFO(dev_priv)->display.has_dsc)
> -		return false;
> -
> -	/* On TGL, DSC is supported on all Pipes */
> -	if (INTEL_GEN(dev_priv) >= 12)
> -		return true;
> -
> -	if (INTEL_GEN(dev_priv) >= 10 &&
> -	    pipe_config->cpu_transcoder != TRANSCODER_A)
> -		return true;
> -
> -	return false;
> -}
> -
>  static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
> -				  const struct intel_crtc_state *pipe_config)
> +				  const struct intel_crtc_state *crtc_state)
>  {
> -	if (!intel_dp_is_edp(intel_dp) && !pipe_config->fec_enable)
> +	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> +
> +	if (!intel_dp_is_edp(intel_dp) && !crtc_state->fec_enable)
>  		return false;
>  
> -	return intel_dp_source_supports_dsc(intel_dp, pipe_config) &&
> +	return intel_dsc_source_support(encoder, crtc_state) &&
>  		drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 7bd727129a8f..a1b0f7cf1a96 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -334,6 +334,25 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
>  	return &rc_parameters[row_index][column_index];
>  }
>  
> +bool intel_dsc_source_support(struct intel_encoder *encoder,
> +			      const struct intel_crtc_state *crtc_state)
> +{
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> +	if (!INTEL_INFO(i915)->display.has_dsc)
> +		return false;
> +
> +	/* On TGL, DSC is supported on all Pipes */
> +	if (INTEL_GEN(i915) >= 12)
> +		return true;
> +
> +	if (INTEL_GEN(i915) >= 10 &&
> +	    crtc_state->cpu_transcoder != TRANSCODER_A)
> +		return true;
> +
> +	return false;
> +}
> +
>  int intel_dsc_compute_params(struct intel_encoder *encoder,
>  			     struct intel_crtc_state *pipe_config)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
> index 4ed2256750c3..e6e9f5b5c6ff 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> @@ -9,6 +9,8 @@
>  struct intel_encoder;
>  struct intel_crtc_state;
>  
> +bool intel_dsc_source_support(struct intel_encoder *encoder,
> +			      const struct intel_crtc_state *crtc_state);
>  void intel_dsc_enable(struct intel_encoder *encoder,
>  		      const struct intel_crtc_state *crtc_state);
>  void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
> -- 
> 2.20.1
> 
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  reply	other threads:[~2019-12-10 23:09 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-10 10:50 [Intel-gfx] [v4.1 00/16] drm/i915/dsi: enable DSC Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 01/16] drm/i915/bios: pass devdata to parse_ddi_port Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 02/16] drm/i915/bios: parse compression parameters block Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 03/16] drm/i915/bios: add support for querying DSC details for encoder Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 04/16] drm/i915/dsc: move DP specific compute params to intel_dp.c Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 05/16] drm/i915/dsc: move slice height calculation to encoder Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 06/16] drm/i915/dsc: add support for computing and writing PPS for DSI encoders Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 07/16] drm/i915/dsc: make DSC source support helper generic Jani Nikula
2019-12-10 23:04   ` Manasi Navare [this message]
2019-12-10 10:50 ` [Intel-gfx] [v4.1 08/16] drm/i915/dsc: add basic hardware state readout support Jani Nikula
2019-12-10 23:13   ` Manasi Navare
2019-12-11  6:39     ` Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 09/16] drm/i915/dsi: set pipe_bpp on ICL configure config Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 10/16] drm/i915/dsi: abstract afe_clk calculation Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 11/16] drm/i915/dsi: use afe_clk() instead of intel_dsi_bitrate() Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 12/16] drm/i915/dsi: take compression into account in afe_clk() Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 13/16] drm/i915/dsi: use compressed pixel format with DSC Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 14/16] drm/i915/dsi: account for DSC in horizontal timings Jani Nikula
2019-12-10 10:50 ` [Intel-gfx] [v4.1 15/16] drm/i915/dsi: Fix state mismatch warns for horizontal timings with DSC Jani Nikula
2019-12-10 10:51 ` [Intel-gfx] [v4.1 16/16] drm/i915/dsi: add support for DSC Jani Nikula
2019-12-11  5:51   ` Kulkarni, Vandita
2019-12-11  6:40     ` Jani Nikula
2019-12-10 18:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: enable DSC (rev7) Patchwork
2019-12-10 18:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2019-12-11  1:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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