From: Will Deacon <will@kernel.org>
To: linux-kernel@vger.kernel.org, iommu@lists.linuxfoundation.org
Cc: "Isaac J. Manjarres" <isaacm@codeaurora.org>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Saravana Kannan <saravanak@google.com>,
kernel-team@android.com, Robin Murphy <robin.murphy@arm.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v4 15/16] iommu/arm-smmu: Allow building as a module
Date: Thu, 19 Dec 2019 12:03:51 +0000 [thread overview]
Message-ID: <20191219120352.382-16-will@kernel.org> (raw)
In-Reply-To: <20191219120352.382-1-will@kernel.org>
By conditionally dropping support for the legacy binding and exporting
the newly introduced 'arm_smmu_impl_init()' function we can allow the
ARM SMMU driver to be built as a module.
Signed-off-by: Will Deacon <will@kernel.org>
---
drivers/iommu/Kconfig | 14 ++++++++++-
drivers/iommu/Makefile | 3 ++-
drivers/iommu/arm-smmu.c | 52 ++++++++++++++++++++++++----------------
3 files changed, 47 insertions(+), 22 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index 31f0f376ad11..d66ace717cf4 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -356,7 +356,7 @@ config SPAPR_TCE_IOMMU
# ARM IOMMU support
config ARM_SMMU
- bool "ARM Ltd. System MMU (SMMU) Support"
+ tristate "ARM Ltd. System MMU (SMMU) Support"
depends on (ARM64 || ARM) && MMU
select IOMMU_API
select IOMMU_IO_PGTABLE_LPAE
@@ -368,6 +368,18 @@ config ARM_SMMU
Say Y here if your SoC includes an IOMMU device implementing
the ARM SMMU architecture.
+config ARM_SMMU_LEGACY_DT_BINDINGS
+ bool "Support the legacy \"mmu-masters\" devicetree bindings"
+ depends on ARM_SMMU=y && OF
+ help
+ Support for the badly designed and deprecated "mmu-masters"
+ devicetree bindings. This allows some DMA masters to attach
+ to the SMMU but does not provide any support via the DMA API.
+ If you're lucky, you might be able to get VFIO up and running.
+
+ If you say Y here then you'll make me very sad. Instead, say N
+ and move your firmware to the utopian future that was 2016.
+
config ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT
bool "Default to disabling bypass on ARM SMMU v1 and v2"
depends on ARM_SMMU
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 97814cc861ea..2104fb8afc06 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -14,7 +14,8 @@ obj-$(CONFIG_MSM_IOMMU) += msm_iommu.o
obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o amd_iommu_init.o amd_iommu_quirks.o
obj-$(CONFIG_AMD_IOMMU_DEBUGFS) += amd_iommu_debugfs.o
obj-$(CONFIG_AMD_IOMMU_V2) += amd_iommu_v2.o
-obj-$(CONFIG_ARM_SMMU) += arm-smmu.o arm-smmu-impl.o arm-smmu-qcom.o
+obj-$(CONFIG_ARM_SMMU) += arm-smmu-mod.o
+arm-smmu-mod-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-qcom.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o intel-pasid.o
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 1f0c09bf112a..3cfa138fbd4f 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -126,6 +126,12 @@ static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom)
return container_of(dom, struct arm_smmu_domain, domain);
}
+static struct platform_driver arm_smmu_driver;
+static struct iommu_ops arm_smmu_ops;
+
+#ifdef CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS
+static int arm_smmu_bus_init(struct iommu_ops *ops);
+
static struct device_node *dev_get_dev_node(struct device *dev)
{
if (dev_is_pci(dev)) {
@@ -161,9 +167,6 @@ static int __find_legacy_master_phandle(struct device *dev, void *data)
return err == -ENOENT ? 0 : err;
}
-static struct platform_driver arm_smmu_driver;
-static struct iommu_ops arm_smmu_ops;
-
static int arm_smmu_register_legacy_master(struct device *dev,
struct arm_smmu_device **smmu)
{
@@ -215,6 +218,27 @@ static int arm_smmu_register_legacy_master(struct device *dev,
return err;
}
+/*
+ * With the legacy DT binding in play, we have no guarantees about
+ * probe order, but then we're also not doing default domains, so we can
+ * delay setting bus ops until we're sure every possible SMMU is ready,
+ * and that way ensure that no add_device() calls get missed.
+ */
+static int arm_smmu_legacy_bus_init(void)
+{
+ if (using_legacy_binding)
+ return arm_smmu_bus_init(&arm_smmu_ops);
+ return 0;
+}
+device_initcall_sync(arm_smmu_legacy_bus_init);
+#else
+static int arm_smmu_register_legacy_master(struct device *dev,
+ struct arm_smmu_device **smmu)
+{
+ return -ENODEV;
+}
+#endif /* CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS */
+
static int __arm_smmu_alloc_bitmap(unsigned long *map, int start, int end)
{
int idx;
@@ -1599,6 +1623,7 @@ static struct iommu_ops arm_smmu_ops = {
.get_resv_regions = arm_smmu_get_resv_regions,
.put_resv_regions = arm_smmu_put_resv_regions,
.pgsize_bitmap = -1UL, /* Restricted during device attach */
+ .owner = THIS_MODULE,
};
static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
@@ -1993,8 +2018,10 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev,
legacy_binding = of_find_property(dev->of_node, "mmu-masters", NULL);
if (legacy_binding && !using_generic_binding) {
- if (!using_legacy_binding)
- pr_notice("deprecated \"mmu-masters\" DT property in use; DMA API support unavailable\n");
+ if (!using_legacy_binding) {
+ pr_notice("deprecated \"mmu-masters\" DT property in use; %s support unavailable\n",
+ IS_ENABLED(CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS) ? "DMA API" : "SMMU");
+ }
using_legacy_binding = true;
} else if (!legacy_binding && !using_legacy_binding) {
using_generic_binding = true;
@@ -2028,7 +2055,6 @@ static int arm_smmu_bus_init(struct iommu_ops *ops)
#endif
#ifdef CONFIG_PCI
if (!iommu_present(&pci_bus_type)) {
- pci_request_acs();
err = bus_set_iommu(&pci_bus_type, ops);
if (err)
goto err_reset_amba_ops;
@@ -2204,20 +2230,6 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
return 0;
}
-/*
- * With the legacy DT binding in play, though, we have no guarantees about
- * probe order, but then we're also not doing default domains, so we can
- * delay setting bus ops until we're sure every possible SMMU is ready,
- * and that way ensure that no add_device() calls get missed.
- */
-static int arm_smmu_legacy_bus_init(void)
-{
- if (using_legacy_binding)
- return arm_smmu_bus_init(&arm_smmu_ops);
- return 0;
-}
-device_initcall_sync(arm_smmu_legacy_bus_init);
-
static int arm_smmu_device_remove(struct platform_device *pdev)
{
struct arm_smmu_device *smmu = platform_get_drvdata(pdev);
--
2.24.1.735.g03f4e72817-goog
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: linux-kernel@vger.kernel.org, iommu@lists.linuxfoundation.org
Cc: kernel-team@android.com, Will Deacon <will@kernel.org>,
Jean-Philippe Brucker <jean-philippe@linaro.org>,
Jordan Crouse <jcrouse@codeaurora.org>,
John Garry <john.garry@huawei.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Saravana Kannan <saravanak@google.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Isaac J. Manjarres" <isaacm@codeaurora.org>,
Robin Murphy <robin.murphy@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Joerg Roedel <joro@8bytes.org>, Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v4 15/16] iommu/arm-smmu: Allow building as a module
Date: Thu, 19 Dec 2019 12:03:51 +0000 [thread overview]
Message-ID: <20191219120352.382-16-will@kernel.org> (raw)
In-Reply-To: <20191219120352.382-1-will@kernel.org>
By conditionally dropping support for the legacy binding and exporting
the newly introduced 'arm_smmu_impl_init()' function we can allow the
ARM SMMU driver to be built as a module.
Signed-off-by: Will Deacon <will@kernel.org>
---
drivers/iommu/Kconfig | 14 ++++++++++-
drivers/iommu/Makefile | 3 ++-
drivers/iommu/arm-smmu.c | 52 ++++++++++++++++++++++++----------------
3 files changed, 47 insertions(+), 22 deletions(-)
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index 31f0f376ad11..d66ace717cf4 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -356,7 +356,7 @@ config SPAPR_TCE_IOMMU
# ARM IOMMU support
config ARM_SMMU
- bool "ARM Ltd. System MMU (SMMU) Support"
+ tristate "ARM Ltd. System MMU (SMMU) Support"
depends on (ARM64 || ARM) && MMU
select IOMMU_API
select IOMMU_IO_PGTABLE_LPAE
@@ -368,6 +368,18 @@ config ARM_SMMU
Say Y here if your SoC includes an IOMMU device implementing
the ARM SMMU architecture.
+config ARM_SMMU_LEGACY_DT_BINDINGS
+ bool "Support the legacy \"mmu-masters\" devicetree bindings"
+ depends on ARM_SMMU=y && OF
+ help
+ Support for the badly designed and deprecated "mmu-masters"
+ devicetree bindings. This allows some DMA masters to attach
+ to the SMMU but does not provide any support via the DMA API.
+ If you're lucky, you might be able to get VFIO up and running.
+
+ If you say Y here then you'll make me very sad. Instead, say N
+ and move your firmware to the utopian future that was 2016.
+
config ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT
bool "Default to disabling bypass on ARM SMMU v1 and v2"
depends on ARM_SMMU
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 97814cc861ea..2104fb8afc06 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -14,7 +14,8 @@ obj-$(CONFIG_MSM_IOMMU) += msm_iommu.o
obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o amd_iommu_init.o amd_iommu_quirks.o
obj-$(CONFIG_AMD_IOMMU_DEBUGFS) += amd_iommu_debugfs.o
obj-$(CONFIG_AMD_IOMMU_V2) += amd_iommu_v2.o
-obj-$(CONFIG_ARM_SMMU) += arm-smmu.o arm-smmu-impl.o arm-smmu-qcom.o
+obj-$(CONFIG_ARM_SMMU) += arm-smmu-mod.o
+arm-smmu-mod-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-qcom.o
obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
obj-$(CONFIG_DMAR_TABLE) += dmar.o
obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o intel-pasid.o
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 1f0c09bf112a..3cfa138fbd4f 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -126,6 +126,12 @@ static struct arm_smmu_domain *to_smmu_domain(struct iommu_domain *dom)
return container_of(dom, struct arm_smmu_domain, domain);
}
+static struct platform_driver arm_smmu_driver;
+static struct iommu_ops arm_smmu_ops;
+
+#ifdef CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS
+static int arm_smmu_bus_init(struct iommu_ops *ops);
+
static struct device_node *dev_get_dev_node(struct device *dev)
{
if (dev_is_pci(dev)) {
@@ -161,9 +167,6 @@ static int __find_legacy_master_phandle(struct device *dev, void *data)
return err == -ENOENT ? 0 : err;
}
-static struct platform_driver arm_smmu_driver;
-static struct iommu_ops arm_smmu_ops;
-
static int arm_smmu_register_legacy_master(struct device *dev,
struct arm_smmu_device **smmu)
{
@@ -215,6 +218,27 @@ static int arm_smmu_register_legacy_master(struct device *dev,
return err;
}
+/*
+ * With the legacy DT binding in play, we have no guarantees about
+ * probe order, but then we're also not doing default domains, so we can
+ * delay setting bus ops until we're sure every possible SMMU is ready,
+ * and that way ensure that no add_device() calls get missed.
+ */
+static int arm_smmu_legacy_bus_init(void)
+{
+ if (using_legacy_binding)
+ return arm_smmu_bus_init(&arm_smmu_ops);
+ return 0;
+}
+device_initcall_sync(arm_smmu_legacy_bus_init);
+#else
+static int arm_smmu_register_legacy_master(struct device *dev,
+ struct arm_smmu_device **smmu)
+{
+ return -ENODEV;
+}
+#endif /* CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS */
+
static int __arm_smmu_alloc_bitmap(unsigned long *map, int start, int end)
{
int idx;
@@ -1599,6 +1623,7 @@ static struct iommu_ops arm_smmu_ops = {
.get_resv_regions = arm_smmu_get_resv_regions,
.put_resv_regions = arm_smmu_put_resv_regions,
.pgsize_bitmap = -1UL, /* Restricted during device attach */
+ .owner = THIS_MODULE,
};
static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
@@ -1993,8 +2018,10 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev,
legacy_binding = of_find_property(dev->of_node, "mmu-masters", NULL);
if (legacy_binding && !using_generic_binding) {
- if (!using_legacy_binding)
- pr_notice("deprecated \"mmu-masters\" DT property in use; DMA API support unavailable\n");
+ if (!using_legacy_binding) {
+ pr_notice("deprecated \"mmu-masters\" DT property in use; %s support unavailable\n",
+ IS_ENABLED(CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS) ? "DMA API" : "SMMU");
+ }
using_legacy_binding = true;
} else if (!legacy_binding && !using_legacy_binding) {
using_generic_binding = true;
@@ -2028,7 +2055,6 @@ static int arm_smmu_bus_init(struct iommu_ops *ops)
#endif
#ifdef CONFIG_PCI
if (!iommu_present(&pci_bus_type)) {
- pci_request_acs();
err = bus_set_iommu(&pci_bus_type, ops);
if (err)
goto err_reset_amba_ops;
@@ -2204,20 +2230,6 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
return 0;
}
-/*
- * With the legacy DT binding in play, though, we have no guarantees about
- * probe order, but then we're also not doing default domains, so we can
- * delay setting bus ops until we're sure every possible SMMU is ready,
- * and that way ensure that no add_device() calls get missed.
- */
-static int arm_smmu_legacy_bus_init(void)
-{
- if (using_legacy_binding)
- return arm_smmu_bus_init(&arm_smmu_ops);
- return 0;
-}
-device_initcall_sync(arm_smmu_legacy_bus_init);
-
static int arm_smmu_device_remove(struct platform_device *pdev)
{
struct arm_smmu_device *smmu = platform_get_drvdata(pdev);
--
2.24.1.735.g03f4e72817-goog
next prev parent reply other threads:[~2019-12-19 12:04 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-19 12:03 [PATCH v4 00/16] iommu: Permit modular builds of ARM SMMU[v3] drivers Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 01/16] drivers/iommu: Export core IOMMU API symbols to permit modular drivers Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 02/16] iommu/of: Request ACS from the PCI core when configuring IOMMU linkage Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 03/16] PCI/ATS: Restore EXPORT_SYMBOL_GPL() for pci_{enable, disable}_ats() Will Deacon
2019-12-19 12:03 ` [PATCH v4 03/16] PCI/ATS: Restore EXPORT_SYMBOL_GPL() for pci_{enable,disable}_ats() Will Deacon
2019-12-20 8:43 ` Joerg Roedel
2019-12-20 8:43 ` Joerg Roedel
2019-12-20 15:03 ` Bjorn Helgaas
2019-12-20 15:03 ` Bjorn Helgaas
2019-12-19 12:03 ` [PATCH v4 04/16] PCI: Export pci_ats_disabled() as a GPL symbol to modules Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 05/16] drivers/iommu: Take a ref to the IOMMU driver prior to ->add_device() Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 14:44 ` Greg Kroah-Hartman
2019-12-19 14:44 ` Greg Kroah-Hartman
2020-01-09 14:16 ` Will Deacon
2020-01-09 14:16 ` Will Deacon
2020-01-09 18:17 ` Greg Kroah-Hartman
2020-01-09 18:17 ` Greg Kroah-Hartman
2019-12-19 12:03 ` [PATCH v4 06/16] iommu/of: Take a ref to the IOMMU driver during ->of_xlate() Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 07/16] drivers/iommu: Allow IOMMU bus ops to be unregistered Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 08/16] Revert "iommu/arm-smmu: Make arm-smmu-v3 explicitly non-modular" Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 09/16] Revert "iommu/arm-smmu: Make arm-smmu " Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 10/16] iommu/arm-smmu: Prevent forced unbinding of Arm SMMU drivers Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 11/16] iommu/arm-smmu-v3: Unregister IOMMU and bus ops on device removal Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 12/16] iommu/arm-smmu: Support SMMU module probing from the IORT Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 13/16] iommu/arm-smmu-v3: Allow building as a module Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` [PATCH v4 14/16] iommu/arm-smmu: Unregister IOMMU and bus ops on device removal Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:03 ` Will Deacon [this message]
2019-12-19 12:03 ` [PATCH v4 15/16] iommu/arm-smmu: Allow building as a module Will Deacon
2019-12-19 12:03 ` [PATCH v4 16/16] iommu/arm-smmu: Update my email address in MODULE_AUTHOR() Will Deacon
2019-12-19 12:03 ` Will Deacon
2019-12-19 12:12 ` [PATCH v4 00/16] iommu: Permit modular builds of ARM SMMU[v3] drivers John Garry
2019-12-19 12:12 ` John Garry
2019-12-19 14:44 ` Greg Kroah-Hartman
2019-12-19 14:44 ` Greg Kroah-Hartman
2019-12-20 16:13 ` Joerg Roedel
2019-12-20 16:13 ` Joerg Roedel
2020-01-06 10:48 ` Will Deacon
2020-01-06 10:48 ` Will Deacon
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