From: Rob Herring <robh@kernel.org>
To: Yuti Amonkar <yamonkar@cadence.com>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, maxime@cerno.tech, airlied@linux.ie,
daniel@ffwll.ch, mark.rutland@arm.com, a.hajda@samsung.com,
narmstrong@baylibre.com, Laurent.pinchart@ideasonboard.com,
jonas@kwiboo.se, jernej.skrabec@siol.net, praneeth@ti.com,
jsarha@ti.com, tomi.valkeinen@ti.com, mparab@cadence.com,
sjakhade@cadence.com
Subject: Re: [PATCH v2 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings in yaml format
Date: Sat, 4 Jan 2020 14:29:13 -0700 [thread overview]
Message-ID: <20200104212913.GA12151@bogus> (raw)
In-Reply-To: <1577114202-15970-2-git-send-email-yamonkar@cadence.com>
On Mon, Dec 23, 2019 at 04:16:40PM +0100, Yuti Amonkar wrote:
> Document the bindings used for the Cadence MHDP DPI/DP bridge in
> yaml format.
>
> Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
> ---
> .../bindings/display/bridge/cdns,mhdp.yaml | 109 +++++++++++++++++++++
> 1 file changed, 109 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> new file mode 100644
> index 0000000..aed6224
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> @@ -0,0 +1,109 @@
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Cadence MHDP bridge
> +
> +maintainers:
> + - Swapnil Jakhade <sjakhade@cadence.com>
> + - Yuti Amonkar <yamonkar@cadence.com>
> +
> +properties:
> + compatible:
> + enum:
> + - cdns,mhdp8546
> + - ti,j721e-mhdp8546
> +
> + clocks:
> + maxItems: 1
> + description:
> + DP bridge clock, it's used by the IP to know how to translate a number of
> + clock cycles into a time (which is used to comply with DP standard timings
> + and delays).
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> + items:
> + - description:
> + Register block of mhdptx apb registers upto PHY mapped area(AUX_CONFIG_P).
> + The AUX and PMA registers are mapped to associated phy driver.
> + - description:
> + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
> +
> + reg-names:
> + minItems: 1
> + maxItems: 2
> + items:
> + - const: mhdptx
> + - const: j721e-intg
> +
> + phys:
> + description: see the Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> +
> + phy-names:
> + const: dpphy
> +
> + ports:
> + type: object
> + description:
> + Ports as described in Documentation/devicetree/bindings/graph.txt
> + properties:
> + '#address-cells':
> + const: 1
> + '#size-cells':
> + const: 0
> + port@0:
type: object
> + description:
> + input port representing the DP bridge input
> +
> + port@1:
type: object
> + description:
> + output port representing the DP bridge output
> + required:
> + - port@0
> + - port@1
> + - '#address-cells'
> + - '#size-cells'
> +
> +required:
> + - compatible
> + - clocks
> + - reg
> + - phys
> + - phy-names
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + mhdp: dp-bridge@f0fb000000 {
> + compatible = "cdns,mhdp8546";
> + reg = <0xf0 0xfb000000 0x0 0x1000000>,
> + <0xf0 0xfc000000 0x0 0x2000000>;
> + clocks = <&mhdp_clock>;
> + phys = <&dp_phy>;
> + phy-names = "dpphy";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dp_bridge_input: endpoint {
> + remote-endpoint = <&xxx_dpi_output>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dp_bridge_output: endpoint {
> + remote-endpoint = <&xxx_dp_connector_input>;
> + };
> + };
> + };
> + };
> +...
> --
> 2.7.4
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Yuti Amonkar <yamonkar@cadence.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
jernej.skrabec@siol.net, praneeth@ti.com,
narmstrong@baylibre.com, airlied@linux.ie, jonas@kwiboo.se,
jsarha@ti.com, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, tomi.valkeinen@ti.com,
maxime@cerno.tech, sjakhade@cadence.com, mparab@cadence.com,
Laurent.pinchart@ideasonboard.com
Subject: Re: [PATCH v2 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings in yaml format
Date: Sat, 4 Jan 2020 14:29:13 -0700 [thread overview]
Message-ID: <20200104212913.GA12151@bogus> (raw)
In-Reply-To: <1577114202-15970-2-git-send-email-yamonkar@cadence.com>
On Mon, Dec 23, 2019 at 04:16:40PM +0100, Yuti Amonkar wrote:
> Document the bindings used for the Cadence MHDP DPI/DP bridge in
> yaml format.
>
> Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
> ---
> .../bindings/display/bridge/cdns,mhdp.yaml | 109 +++++++++++++++++++++
> 1 file changed, 109 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> new file mode 100644
> index 0000000..aed6224
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> @@ -0,0 +1,109 @@
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Cadence MHDP bridge
> +
> +maintainers:
> + - Swapnil Jakhade <sjakhade@cadence.com>
> + - Yuti Amonkar <yamonkar@cadence.com>
> +
> +properties:
> + compatible:
> + enum:
> + - cdns,mhdp8546
> + - ti,j721e-mhdp8546
> +
> + clocks:
> + maxItems: 1
> + description:
> + DP bridge clock, it's used by the IP to know how to translate a number of
> + clock cycles into a time (which is used to comply with DP standard timings
> + and delays).
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> + items:
> + - description:
> + Register block of mhdptx apb registers upto PHY mapped area(AUX_CONFIG_P).
> + The AUX and PMA registers are mapped to associated phy driver.
> + - description:
> + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
> +
> + reg-names:
> + minItems: 1
> + maxItems: 2
> + items:
> + - const: mhdptx
> + - const: j721e-intg
> +
> + phys:
> + description: see the Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> +
> + phy-names:
> + const: dpphy
> +
> + ports:
> + type: object
> + description:
> + Ports as described in Documentation/devicetree/bindings/graph.txt
> + properties:
> + '#address-cells':
> + const: 1
> + '#size-cells':
> + const: 0
> + port@0:
type: object
> + description:
> + input port representing the DP bridge input
> +
> + port@1:
type: object
> + description:
> + output port representing the DP bridge output
> + required:
> + - port@0
> + - port@1
> + - '#address-cells'
> + - '#size-cells'
> +
> +required:
> + - compatible
> + - clocks
> + - reg
> + - phys
> + - phy-names
> + - ports
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + mhdp: dp-bridge@f0fb000000 {
> + compatible = "cdns,mhdp8546";
> + reg = <0xf0 0xfb000000 0x0 0x1000000>,
> + <0xf0 0xfc000000 0x0 0x2000000>;
> + clocks = <&mhdp_clock>;
> + phys = <&dp_phy>;
> + phy-names = "dpphy";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dp_bridge_input: endpoint {
> + remote-endpoint = <&xxx_dpi_output>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dp_bridge_output: endpoint {
> + remote-endpoint = <&xxx_dp_connector_input>;
> + };
> + };
> + };
> + };
> +...
> --
> 2.7.4
>
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next prev parent reply other threads:[~2020-01-04 21:29 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-23 15:16 [PATCH v2 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper Yuti Amonkar
2019-12-23 15:16 ` Yuti Amonkar
2019-12-23 15:16 ` [PATCH v2 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings in yaml format Yuti Amonkar
2019-12-23 15:16 ` Yuti Amonkar
2019-12-23 17:22 ` Maxime Ripard
2019-12-23 17:22 ` Maxime Ripard
2020-01-04 21:29 ` Rob Herring [this message]
2020-01-04 21:29 ` Rob Herring
2019-12-23 15:16 ` [PATCH v2 2/3] drm: bridge: Add support for Cadence MHDP DPI/DP bridge Yuti Amonkar
2019-12-23 15:16 ` Yuti Amonkar
2019-12-23 15:16 ` [PATCH v2 3/3] drm/mhdp: add j721e wrapper Yuti Amonkar
2019-12-23 15:16 ` Yuti Amonkar
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