From: Stephen Boyd <sboyd@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Michael Turquette <mturquette@baylibre.com>
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Masami Hiramatsu <masami.hiramatsu@linaro.org>,
Jassi Brar <jaswinder.singh@linaro.org>,
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Subject: Re: [PATCH v2] clk: uniphier: Add SCSSI clock gate for each channel
Date: Sat, 04 Jan 2020 23:14:38 -0800 [thread overview]
Message-ID: <20200105071438.F10452085B@mail.kernel.org> (raw)
In-Reply-To: <1577410925-22021-1-git-send-email-hayashi.kunihiko@socionext.com>
Quoting Kunihiko Hayashi (2019-12-26 17:42:05)
> SCSSI has clock gates for each channel in the SoCs newer than Pro4,
> so this adds missing clock gates for channel 1, 2 and 3. And more, this
> moves MCSSI clock ID after SCSSI.
>
> Fixes: ff388ee36516 ("clk: uniphier: add clock frequency support for SPI")
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
Applied to clk-next
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Michael Turquette <mturquette@baylibre.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
Masami Hiramatsu <masami.hiramatsu@linaro.org>,
linux-kernel@vger.kernel.org,
Jassi Brar <jaswinder.singh@linaro.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] clk: uniphier: Add SCSSI clock gate for each channel
Date: Sat, 04 Jan 2020 23:14:38 -0800 [thread overview]
Message-ID: <20200105071438.F10452085B@mail.kernel.org> (raw)
In-Reply-To: <1577410925-22021-1-git-send-email-hayashi.kunihiko@socionext.com>
Quoting Kunihiko Hayashi (2019-12-26 17:42:05)
> SCSSI has clock gates for each channel in the SoCs newer than Pro4,
> so this adds missing clock gates for channel 1, 2 and 3. And more, this
> moves MCSSI clock ID after SCSSI.
>
> Fixes: ff388ee36516 ("clk: uniphier: add clock frequency support for SPI")
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
Applied to clk-next
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next prev parent reply other threads:[~2020-01-05 7:14 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-27 1:42 [PATCH v2] clk: uniphier: Add SCSSI clock gate for each channel Kunihiko Hayashi
2019-12-27 1:42 ` Kunihiko Hayashi
2020-01-05 7:14 ` Stephen Boyd [this message]
2020-01-05 7:14 ` Stephen Boyd
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