* [PATCH 2/2 v2] dt-bindings: Convert Faraday FTIDE010 to DT schema
2020-01-06 1:42 [PATCH 1/2 v2] dt-bindings: Create DT bindings for [PS]ATA controllers Linus Walleij
@ 2020-01-06 1:42 ` Linus Walleij
2020-01-06 22:38 ` [PATCH 1/2 v2] dt-bindings: Create DT bindings for [PS]ATA controllers Rob Herring
1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2020-01-06 1:42 UTC (permalink / raw)
To: Rob Herring, devicetree, Jens Axboe; +Cc: linux-ide, Linus Walleij, device
This uses the new pata-sata-controller.yaml schema to
convert the Faraday FTIDE010 to DT schema.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: device@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Rename the node for the example controller to "ide@"
- Rename the drives to ports, so ide-port@0 etc instead of
drive@0.
---
.../bindings/ata/faraday,ftide010.txt | 38 --------
.../bindings/ata/faraday,ftide010.yaml | 89 +++++++++++++++++++
2 files changed, 89 insertions(+), 38 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ata/faraday,ftide010.txt
create mode 100644 Documentation/devicetree/bindings/ata/faraday,ftide010.yaml
diff --git a/Documentation/devicetree/bindings/ata/faraday,ftide010.txt b/Documentation/devicetree/bindings/ata/faraday,ftide010.txt
deleted file mode 100644
index a0c64a29104d..000000000000
--- a/Documentation/devicetree/bindings/ata/faraday,ftide010.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-* Faraday Technology FTIDE010 PATA controller
-
-This controller is the first Faraday IDE interface block, used in the
-StorLink SL2312 and SL3516, later known as the Cortina Systems Gemini
-platform. The controller can do PIO modes 0 through 4, Multi-word DMA
-(MWDM)modes 0 through 2 and Ultra DMA modes 0 through 6.
-
-On the Gemini platform, this PATA block is accompanied by a PATA to
-SATA bridge in order to support SATA. This is why a phandle to that
-controller is compulsory on that platform.
-
-The timing properties are unique per-SoC, not per-board.
-
-Required properties:
-- compatible: should be one of
- "cortina,gemini-pata", "faraday,ftide010"
- "faraday,ftide010"
-- interrupts: interrupt for the block
-- reg: registers and size for the block
-
-Optional properties:
-- clocks: a SoC clock running the peripheral.
-- clock-names: should be set to "PCLK" for the peripheral clock.
-
-Required properties for "cortina,gemini-pata" compatible:
-- sata: a phande to the Gemini PATA to SATA bridge, see
- cortina,gemini-sata-bridge.txt for details.
-
-Example:
-
-ata@63000000 {
- compatible = "cortina,gemini-pata", "faraday,ftide010";
- reg = <0x63000000 0x100>;
- interrupts = <4 IRQ_TYPE_EDGE_RISING>;
- clocks = <&gcc GEMINI_CLK_GATE_IDE>;
- clock-names = "PCLK";
- sata = <&sata>;
-};
diff --git a/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml b/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml
new file mode 100644
index 000000000000..f7b9b625c0f2
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/faraday,ftide010.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Faraday Technology FTIDE010 PATA controller
+
+maintainers:
+ - Linus Walleij <linus.walleij@linaro.org>
+
+description: |
+ This controller is the first Faraday IDE interface block, used in the
+ StorLink SL3512 and SL3516, later known as the Cortina Systems Gemini
+ platform. The controller can do PIO modes 0 through 4, Multi-word DMA
+ (MWDM) modes 0 through 2 and Ultra DMA modes 0 through 6.
+
+ On the Gemini platform, this PATA block is accompanied by a PATA to
+ SATA bridge in order to support SATA. This is why a phandle to that
+ controller is compulsory on that platform.
+
+ The timing properties are unique per-SoC, not per-board.
+
+properties:
+ compatible:
+ oneOf:
+ - const: faraday,ftide010
+ - items:
+ - const: cortina,gemini-pata
+ - const: faraday,ftide010
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+
+ clock-names:
+ const: PCLK
+
+ sata:
+ description:
+ phandle to the Gemini PATA to SATA bridge, if available
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+allOf:
+ - $ref: pata-sata-common.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: cortina,gemini-pata
+
+ then:
+ required:
+ - sata
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/clock/cortina,gemini-clock.h>
+
+ ide@63000000 {
+ compatible = "cortina,gemini-pata", "faraday,ftide010";
+ reg = <0x63000000 0x100>;
+ interrupts = <4 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&gcc GEMINI_CLK_GATE_IDE>;
+ clock-names = "PCLK";
+ sata = <&sata>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ide-port@0 {
+ reg = <0>;
+ };
+ ide-port@1 {
+ reg = <1>;
+ };
+ };
+
+...
--
2.21.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/2 v2] dt-bindings: Create DT bindings for [PS]ATA controllers
2020-01-06 1:42 [PATCH 1/2 v2] dt-bindings: Create DT bindings for [PS]ATA controllers Linus Walleij
2020-01-06 1:42 ` [PATCH 2/2 v2] dt-bindings: Convert Faraday FTIDE010 to DT schema Linus Walleij
@ 2020-01-06 22:38 ` Rob Herring
1 sibling, 0 replies; 3+ messages in thread
From: Rob Herring @ 2020-01-06 22:38 UTC (permalink / raw)
To: Linus Walleij; +Cc: devicetree, Jens Axboe, linux-ide
On Mon, Jan 06, 2020 at 02:42:23AM +0100, Linus Walleij wrote:
> I need to create subnodes for drives connected to PATA
> or SATA host controllers, and this needs to be supported
> generally, so create a common YAML binding for
> "ide" or "sata" that will support subnodes with ports.
>
> This has been designed as a subset of
> ata/pata-sata-common.yaml with the bare essentials and
> should be possible to extend or superset to cover the
> common bindings.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> ChangeLog v1->v2:
> - Use ide@ and sata@ as node names.
> - Use ide-port@ and sata-port@ for the ports toward the
> drives, rather than letting the subnodes be the drives
> themselves.
> ---
> .../bindings/ata/pata-sata-common.yaml | 51 +++++++++++++++++++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ata/pata-sata-common.yaml
>
> diff --git a/Documentation/devicetree/bindings/ata/pata-sata-common.yaml b/Documentation/devicetree/bindings/ata/pata-sata-common.yaml
> new file mode 100644
> index 000000000000..f46f04446607
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/pata-sata-common.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ata/pata-sata-common.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Common Properties for Parallel and Serial AT attachment controllers
> +
> +maintainers:
> + - Linus Walleij <linus.walleij@linaro.org>
> +
> +description: |
> + This document defines device tree properties common to most Parallel
> + (PATA, also known as IDE) and Serial (SATA) AT attachment storage devices.
> + It doesn't constitue a device tree binding specification by itself but is
> + meant to be referenced by device tree bindings.
> +
> + The PATA/SATA controller device tree bindings are responsible for
> + defining whether each property is required or optional.
> +
> +properties:
> + $nodename:
> + pattern: "^(ide|sata)(@.*)?$"
> + description:
> + Specifies the host controller node. PATA host controller nodes are named
> + "ide" and SATA controller nodes are named "sata"
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> +patternProperties:
> + "^(ide|sata)-port@[0-1]$":
This would allow ide@... to have sata-port@... as a child node.
> + description: |
> + DT nodes for ports connected on the PATA or SATA host. The master drive
> + will have ID number 0 and the slave drive will have ID number 1.
> + The PATA port nodes will be named "ide-port" and the SATA port nodes will
> + be named "sata-port".
> + type: object
> +
> + properties:
> + reg:
> + minimum: 0
> + maximum: 1
For SATA, we can have more than 2.
Given both of the above, probably this should be split into 2 files.
Rob
^ permalink raw reply [flat|nested] 3+ messages in thread