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From: Thierry Reding <thierry.reding@gmail.com>
To: Stephen Warren <swarren@wwwdotorg.org>
Cc: Jonathan Hunter <jonathanh@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH V3 1/4] clk: tegra: mark fuse clock as critical
Date: Wed, 8 Jan 2020 12:59:49 +0100	[thread overview]
Message-ID: <20200108115949.GA1993114@ulmo> (raw)
In-Reply-To: <20191003205033.98381-1-swarren@wwwdotorg.org>

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On Thu, Oct 03, 2019 at 02:50:30PM -0600, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
> 
> For a little over a year, U-Boot on Tegra124 has configured the flow
> controller to perform automatic RAM re-repair on off->on power transitions
> of the CPU rail1]. This is mandatory for correct operation of Tegra124.
> However, RAM re-repair relies on certain clocks, which the kernel must
> enable and leave running. The fuse clock is one of those clocks. Mark this
> clock as critical so that LP1 power mode (system suspend) operates
> correctly.
> 
> [1] 3cc7942a4ae5 ARM: tegra: implement RAM repair
> 
> Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> v3: Added comment to the clock table entry indicating why the clock is
>     critical.
> v2: Set CRITICAL flag on the clock, rather than enabling it in
>     tegra124_init_table[].
> ---
>  drivers/clk/tegra/clk-tegra-periph.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)

Applied to for-5.6/clk, thanks.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Stephen Warren <swarren@wwwdotorg.org>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	linux-clk@vger.kernel.org, Jonathan Hunter <jonathanh@nvidia.com>,
	linux-tegra@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V3 1/4] clk: tegra: mark fuse clock as critical
Date: Wed, 8 Jan 2020 12:59:49 +0100	[thread overview]
Message-ID: <20200108115949.GA1993114@ulmo> (raw)
In-Reply-To: <20191003205033.98381-1-swarren@wwwdotorg.org>


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On Thu, Oct 03, 2019 at 02:50:30PM -0600, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
> 
> For a little over a year, U-Boot on Tegra124 has configured the flow
> controller to perform automatic RAM re-repair on off->on power transitions
> of the CPU rail1]. This is mandatory for correct operation of Tegra124.
> However, RAM re-repair relies on certain clocks, which the kernel must
> enable and leave running. The fuse clock is one of those clocks. Mark this
> clock as critical so that LP1 power mode (system suspend) operates
> correctly.
> 
> [1] 3cc7942a4ae5 ARM: tegra: implement RAM repair
> 
> Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> v3: Added comment to the clock table entry indicating why the clock is
>     critical.
> v2: Set CRITICAL flag on the clock, rather than enabling it in
>     tegra124_init_table[].
> ---
>  drivers/clk/tegra/clk-tegra-periph.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)

Applied to for-5.6/clk, thanks.

Thierry

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  parent reply	other threads:[~2020-01-08 11:59 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-03 20:50 [PATCH V3 1/4] clk: tegra: mark fuse clock as critical Stephen Warren
2019-10-03 20:50 ` Stephen Warren
2019-10-03 20:50 ` Stephen Warren
2019-10-03 20:50 ` [PATCH V3 2/4] ARM: tegra: Enable PLLP bypass during Tegra124 LP1 Stephen Warren
2019-10-03 20:50   ` Stephen Warren
2019-10-03 20:50   ` Stephen Warren
2020-01-08 12:00   ` Thierry Reding
2020-01-08 12:00     ` Thierry Reding
2019-10-03 20:50 ` [PATCH V3 3/4] ARM: tegra: modify reshift divider during LP1 Stephen Warren
2019-10-03 20:50   ` Stephen Warren
2019-10-03 20:50   ` Stephen Warren
2019-10-03 20:50 ` [PATCH V3 4/4] ARM: tegra: use clk_m CPU on Tegra124 LP1 resume Stephen Warren
2019-10-03 20:50   ` Stephen Warren
2019-10-03 20:50   ` Stephen Warren
2020-01-07 16:44 ` [PATCH V3 1/4] clk: tegra: mark fuse clock as critical Stephen Warren
2020-01-07 16:44   ` Stephen Warren
2020-01-07 16:44   ` Stephen Warren
2020-01-08 11:59 ` Thierry Reding [this message]
2020-01-08 11:59   ` Thierry Reding

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