From: Maxime Ripard <maxime@cerno.tech>
To: Chen-Yu Tsai <wens@csie.org>, Maxime Ripard <mripard@kernel.org>
Cc: andre.przywara@arm.com, Maxime Ripard <maxime@cerno.tech>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] arm64: dts: allwinner: h6: Fix PMU compatible
Date: Mon, 10 Feb 2020 10:56:00 +0100 [thread overview]
Message-ID: <20200210095600.77894-2-maxime@cerno.tech> (raw)
In-Reply-To: <20200210095600.77894-1-maxime@cerno.tech>
The commit 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode")
introduced support for the PMU found on the Allwinner H6. However, the
binding only allows for a single compatible, while the patch was adding
two.
Make sure we follow the binding.
Fixes: 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 3329283e38ab..06363c1bea3f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -70,8 +70,7 @@ ext_osc32k: ext_osc32k_clk {
};
pmu {
- compatible = "arm,cortex-a53-pmu",
- "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
--
2.24.1
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next prev parent reply other threads:[~2020-02-10 9:56 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-10 9:55 [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible Maxime Ripard
2020-02-10 9:56 ` Maxime Ripard [this message]
2020-02-25 9:03 ` [PATCH 2/2] arm64: dts: allwinner: h6: " Maxime Ripard
2020-02-14 18:04 ` [PATCH 1/2] arm64: dts: allwinner: h5: " Andre Przywara
2020-02-14 18:18 ` Robin Murphy
2020-02-17 17:49 ` Maxime Ripard
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