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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Piotr Sroka <piotrs@cadence.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
	Richard Weinberger <richard@nod.at>,
	linux-kernel@vger.kernel.org, Marek Vasut <marek.vasut@gmail.com>,
	linux-mtd@lists.infradead.org,
	Brian Norris <computersforpeace@gmail.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Kazuhiro Kasai <kasai.kazuhiro@socionext.com>
Subject: Re: [PATCH 3/4] mtd: rawnand: cadence: change bad block marker size
Date: Tue, 18 Feb 2020 11:47:51 +0100	[thread overview]
Message-ID: <20200218114751.70efa015@xps13> (raw)
In-Reply-To: <1581328530-29966-3-git-send-email-piotrs@cadence.com>

Hi Piotr,

Piotr Sroka <piotrs@cadence.com> wrote on Mon, 10 Feb 2020 10:55:27
+0100:

> Increase bad block marker size from one byte to two bytes.
> Bad block marker is handled by skip bytes feature of HPNFC.
> Controller excpects this value to be an even number.

             expects

Do we break existing users with this change? Do you know how the
controller behaved until now?

Also needs a Fixes/stable tag I guess?

> 
> Signed-off-by: Piotr Sroka <piotrs@cadence.com>
> ---
>  drivers/mtd/nand/raw/cadence-nand-controller.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
> index 2ebfd0934739..5c1bbb05ab51 100644
> --- a/drivers/mtd/nand/raw/cadence-nand-controller.c
> +++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
> @@ -2612,12 +2612,9 @@ int cadence_nand_attach_chip(struct nand_chip *chip)
>  	chip->options |= NAND_NO_SUBPAGE_WRITE;
>  
>  	cdns_chip->bbm_offs = chip->badblockpos;
> -	if (chip->options & NAND_BUSWIDTH_16) {
> -		cdns_chip->bbm_offs &= ~0x01;
> -		cdns_chip->bbm_len = 2;
> -	} else {
> -		cdns_chip->bbm_len = 1;
> -	}
> +	cdns_chip->bbm_offs &= ~0x01;
> +	/* this value should be even number */
> +	cdns_chip->bbm_len = 2;
>  
>  	ret = nand_ecc_choose_conf(chip,
>  				   &cdns_ctrl->ecc_caps,

Thanks,
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Piotr Sroka <piotrs@cadence.com>
Cc: Kazuhiro Kasai <kasai.kazuhiro@socionext.com>,
	Richard Weinberger <richard@nod.at>,
	David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Marek Vasut <marek.vasut@gmail.com>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/4] mtd: rawnand: cadence: change bad block marker size
Date: Tue, 18 Feb 2020 11:47:51 +0100	[thread overview]
Message-ID: <20200218114751.70efa015@xps13> (raw)
In-Reply-To: <1581328530-29966-3-git-send-email-piotrs@cadence.com>

Hi Piotr,

Piotr Sroka <piotrs@cadence.com> wrote on Mon, 10 Feb 2020 10:55:27
+0100:

> Increase bad block marker size from one byte to two bytes.
> Bad block marker is handled by skip bytes feature of HPNFC.
> Controller excpects this value to be an even number.

             expects

Do we break existing users with this change? Do you know how the
controller behaved until now?

Also needs a Fixes/stable tag I guess?

> 
> Signed-off-by: Piotr Sroka <piotrs@cadence.com>
> ---
>  drivers/mtd/nand/raw/cadence-nand-controller.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
> index 2ebfd0934739..5c1bbb05ab51 100644
> --- a/drivers/mtd/nand/raw/cadence-nand-controller.c
> +++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
> @@ -2612,12 +2612,9 @@ int cadence_nand_attach_chip(struct nand_chip *chip)
>  	chip->options |= NAND_NO_SUBPAGE_WRITE;
>  
>  	cdns_chip->bbm_offs = chip->badblockpos;
> -	if (chip->options & NAND_BUSWIDTH_16) {
> -		cdns_chip->bbm_offs &= ~0x01;
> -		cdns_chip->bbm_len = 2;
> -	} else {
> -		cdns_chip->bbm_len = 1;
> -	}
> +	cdns_chip->bbm_offs &= ~0x01;
> +	/* this value should be even number */
> +	cdns_chip->bbm_len = 2;
>  
>  	ret = nand_ecc_choose_conf(chip,
>  				   &cdns_ctrl->ecc_caps,

Thanks,
Miquèl

  reply	other threads:[~2020-02-18 10:48 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-10  9:55 [PATCH 1/4] mtd: rawnand: cadence: get meta data size from registers Piotr Sroka
2020-02-10  9:55 ` Piotr Sroka
2020-02-10  9:55 ` [PATCH 2/4] mtd: rawnand: cadence: fix calculating avaialble oob size Piotr Sroka
2020-02-10  9:55   ` Piotr Sroka
2020-02-18 10:45   ` Miquel Raynal
2020-02-18 10:45     ` Miquel Raynal
2020-03-10 18:29   ` Miquel Raynal
2020-03-10 18:29     ` Miquel Raynal
2020-03-11  7:17     ` Miquel Raynal
2020-03-11  7:17       ` Miquel Raynal
2020-02-10  9:55 ` [PATCH 3/4] mtd: rawnand: cadence: change bad block marker size Piotr Sroka
2020-02-10  9:55   ` Piotr Sroka
2020-02-18 10:47   ` Miquel Raynal [this message]
2020-02-18 10:47     ` Miquel Raynal
2020-03-10 18:29   ` Miquel Raynal
2020-03-10 18:29     ` Miquel Raynal
2020-02-10  9:55 ` [PATCH 4/4] mtd: rawnand: cadence: reinit complete before execute command Piotr Sroka
2020-02-10  9:55   ` Piotr Sroka
2020-02-18 10:48   ` Miquel Raynal
2020-02-18 10:48     ` Miquel Raynal
2020-03-10 18:29   ` Miquel Raynal
2020-03-10 18:29     ` Miquel Raynal
2020-03-10 18:29 ` [PATCH 1/4] mtd: rawnand: cadence: get meta data size from registers Miquel Raynal
2020-03-10 18:29   ` Miquel Raynal

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