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From: Torsten Duwe <duwe@lst.de>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>,
	Jonas Karlman <jonas@kwiboo.se>,
	Neil Armstrong <narmstrong@baylibre.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Vasily Khoruzhick <anarsoul@gmail.com>,
	Andrzej Hajda <a.hajda@samsung.com>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Maxime Ripard <maxime@cerno.tech>
Subject: Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth
Date: Fri, 21 Feb 2020 18:13:28 +0100	[thread overview]
Message-ID: <20200221171328.GC6928@lst.de> (raw)
In-Reply-To: <20200221165127.813325-1-icenowy@aosc.io>

On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
> Current code tries to store the link rate (in bps, which is a big
> number) in a u8, which surely overflow. Then it's converted back to
> bandwidth code (which is thus 0) and written to the chip.
> 
> The code sometimes works because the chip will automatically fallback to
> the lowest possible DP link rate (1.62Gbps) when get the invalid value.
> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps link,
> it failed.
> 
> As we had already read the link bandwidth as bandwidth code in earlier
> code (to check whether it is supported), use it when setting bandwidth,
> instead of converting it to link rate and then converting back.
> 
> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> index 56f55c53abfd..2dfa2fd2a23b 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345)
>  	if (err)
>  		return err;
>  
> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
> +	dpcd[0] = dp_bw;

Why do you make this assignment and not use dp_bw directly in the call?

>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
                                                       ^^^^^^
>  	if (err)
> -- 
> 2.24.1

BTW, my version is only a bit more verbose:

https://patchwork.freedesktop.org/patch/354344/

	Torsten

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WARNING: multiple messages have this Message-ID (diff)
From: Torsten Duwe <duwe@lst.de>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: Andrzej Hajda <a.hajda@samsung.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Jonas Karlman <jonas@kwiboo.se>,
	Jernej Skrabec <jernej.skrabec@siol.net>,
	Maxime Ripard <maxime@cerno.tech>,
	Vasily Khoruzhick <anarsoul@gmail.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth
Date: Fri, 21 Feb 2020 18:13:28 +0100	[thread overview]
Message-ID: <20200221171328.GC6928@lst.de> (raw)
In-Reply-To: <20200221165127.813325-1-icenowy@aosc.io>

On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
> Current code tries to store the link rate (in bps, which is a big
> number) in a u8, which surely overflow. Then it's converted back to
> bandwidth code (which is thus 0) and written to the chip.
> 
> The code sometimes works because the chip will automatically fallback to
> the lowest possible DP link rate (1.62Gbps) when get the invalid value.
> However, on the eDP panel of Olimex TERES-I, which wants 2.7Gbps link,
> it failed.
> 
> As we had already read the link bandwidth as bandwidth code in earlier
> code (to check whether it is supported), use it when setting bandwidth,
> instead of converting it to link rate and then converting back.
> 
> Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> index 56f55c53abfd..2dfa2fd2a23b 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> @@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345)
>  	if (err)
>  		return err;
>  
> -	dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
> -	dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
> +	dpcd[0] = dp_bw;

Why do you make this assignment and not use dp_bw directly in the call?

>  	err = regmap_write(anx6345->map[I2C_IDX_DPTX],
>  			   SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
                                                       ^^^^^^
>  	if (err)
> -- 
> 2.24.1

BTW, my version is only a bit more verbose:

https://patchwork.freedesktop.org/patch/354344/

	Torsten


  reply	other threads:[~2020-02-21 17:13 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-21 16:51 [PATCH] drm/bridge: analogix-anx6345: fix set of link bandwidth Icenowy Zheng
2020-02-21 16:51 ` Icenowy Zheng
2020-02-21 17:13 ` Torsten Duwe [this message]
2020-02-21 17:13   ` Torsten Duwe
2020-02-22  2:43   ` Icenowy Zheng
2020-02-22  2:43     ` Icenowy Zheng
2020-02-24 10:44     ` Torsten Duwe
2020-02-24 10:44       ` Torsten Duwe
2020-02-26 10:58     ` Thomas Zimmermann
2020-02-26 10:58       ` Thomas Zimmermann
2020-02-26 11:02       ` Icenowy Zheng
2020-02-26 11:02         ` Icenowy Zheng
2020-02-26 11:59         ` Thomas Zimmermann
2020-02-26 11:59           ` Thomas Zimmermann
2020-02-27 11:34         ` Thomas Zimmermann
2020-02-27 11:34           ` Thomas Zimmermann

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