From: Joerg Roedel <joro@8bytes.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, iommu@lists.linux-foundation.org,
Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/4] iommu: Add Allwinner H6 IOMMU driver
Date: Mon, 2 Mar 2020 16:36:06 +0100 [thread overview]
Message-ID: <20200302153606.GB6540@8bytes.org> (raw)
In-Reply-To: <6864f0f28825bb7a2ec1c0d811a4aacdecf5f945.1582222496.git-series.maxime@cerno.tech>
Hi Maxime,
On Thu, Feb 20, 2020 at 07:15:14PM +0100, Maxime Ripard wrote:
> +struct sun50i_iommu_domain {
> + struct iommu_domain domain;
> +
> + /* Number of devices attached to the domain */
> + refcount_t refcnt;
> +
> + /* Lock to modify the Directory Table */
> + spinlock_t dt_lock;
I suggest you make page-table updates lock-less. Otherwise this lock
will become a bottle-neck when using the IOMMU through DMA-API.
> +
> +static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova,
> + phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
> +{
> + struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + u32 pte_index;
> + u32 *page_table, *pte_addr;
> + unsigned long flags;
> + int ret = 0;
> +
> + spin_lock_irqsave(&sun50i_domain->dt_lock, flags);
> + page_table = sun50i_dte_get_page_table(sun50i_domain, iova, gfp);
> + if (IS_ERR(page_table)) {
> + ret = PTR_ERR(page_table);
> + goto out;
> + }
> +
> + pte_index = sun50i_iova_get_pte_index(iova);
> + pte_addr = &page_table[pte_index];
> + if (sun50i_pte_is_page_valid(*pte_addr)) {
You can use unlikely() here.
> + phys_addr_t page_phys = sun50i_pte_get_page_address(*pte_addr);
> + dev_err(iommu->dev,
> + "iova %pad already mapped to %pa cannot remap to %pa prot: %#x\n",
> + &iova, &page_phys, &paddr, prot);
> + ret = -EBUSY;
> + goto out;
> + }
> +
> + *pte_addr = sun50i_mk_pte(paddr, prot);
> + sun50i_table_flush(sun50i_domain, pte_addr, 1);
This maps only one page, right? But the function needs to map up to
'size' as given in the parameter list.
> +
> + spin_lock_irqsave(&iommu->iommu_lock, flags);
> + sun50i_iommu_tlb_invalidate(iommu, iova);
> + spin_unlock_irqrestore(&iommu->iommu_lock, flags);
Why is there a need to flush the TLB here? The IOMMU-API provides
call-backs so that the user of the API can decide when it wants
to flush the IO/TLB. Such flushes are usually expensive and doing them
on every map and unmap will cost significant performance.
> +static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
> + size_t size, struct iommu_iotlb_gather *gather)
> +{
> + struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + unsigned long flags;
> + phys_addr_t pt_phys;
> + dma_addr_t pte_dma;
> + u32 *pte_addr;
> + u32 dte;
> +
> + spin_lock_irqsave(&sun50i_domain->dt_lock, flags);
> +
> + dte = sun50i_domain->dt[sun50i_iova_get_dte_index(iova)];
> + if (!sun50i_dte_is_pt_valid(dte)) {
> + spin_unlock_irqrestore(&sun50i_domain->dt_lock, flags);
> + return 0;
> + }
> +
> + pt_phys = sun50i_dte_get_pt_address(dte);
> + pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);
> + pte_dma = pt_phys + sun50i_iova_get_pte_index(iova) * PT_ENTRY_SIZE;
> +
> + if (!sun50i_pte_is_page_valid(*pte_addr)) {
> + spin_unlock_irqrestore(&sun50i_domain->dt_lock, flags);
> + return 0;
> + }
> +
> + memset(pte_addr, 0, sizeof(*pte_addr));
> + sun50i_table_flush(sun50i_domain, pte_addr, 1);
> +
> + spin_lock(&iommu->iommu_lock);
> + sun50i_iommu_tlb_invalidate(iommu, iova);
> + sun50i_iommu_ptw_invalidate(iommu, iova);
> + spin_unlock(&iommu->iommu_lock);
Same objections as in the map function. This only unmaps one page, and
is the IO/TLB flush really needed here?
> +static struct iommu_domain *sun50i_iommu_domain_alloc(unsigned type)
> +{
> + struct sun50i_iommu_domain *sun50i_domain;
> +
> + if (type != IOMMU_DOMAIN_DMA && type != IOMMU_DOMAIN_UNMANAGED)
> + return NULL;
I think you should at least also support identity domains here. The
iommu-core code might allocate those for default domains.
Regards,
Joerg
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, iommu@lists.linux-foundation.org,
Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/4] iommu: Add Allwinner H6 IOMMU driver
Date: Mon, 2 Mar 2020 16:36:06 +0100 [thread overview]
Message-ID: <20200302153606.GB6540@8bytes.org> (raw)
In-Reply-To: <6864f0f28825bb7a2ec1c0d811a4aacdecf5f945.1582222496.git-series.maxime@cerno.tech>
Hi Maxime,
On Thu, Feb 20, 2020 at 07:15:14PM +0100, Maxime Ripard wrote:
> +struct sun50i_iommu_domain {
> + struct iommu_domain domain;
> +
> + /* Number of devices attached to the domain */
> + refcount_t refcnt;
> +
> + /* Lock to modify the Directory Table */
> + spinlock_t dt_lock;
I suggest you make page-table updates lock-less. Otherwise this lock
will become a bottle-neck when using the IOMMU through DMA-API.
> +
> +static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova,
> + phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
> +{
> + struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + u32 pte_index;
> + u32 *page_table, *pte_addr;
> + unsigned long flags;
> + int ret = 0;
> +
> + spin_lock_irqsave(&sun50i_domain->dt_lock, flags);
> + page_table = sun50i_dte_get_page_table(sun50i_domain, iova, gfp);
> + if (IS_ERR(page_table)) {
> + ret = PTR_ERR(page_table);
> + goto out;
> + }
> +
> + pte_index = sun50i_iova_get_pte_index(iova);
> + pte_addr = &page_table[pte_index];
> + if (sun50i_pte_is_page_valid(*pte_addr)) {
You can use unlikely() here.
> + phys_addr_t page_phys = sun50i_pte_get_page_address(*pte_addr);
> + dev_err(iommu->dev,
> + "iova %pad already mapped to %pa cannot remap to %pa prot: %#x\n",
> + &iova, &page_phys, &paddr, prot);
> + ret = -EBUSY;
> + goto out;
> + }
> +
> + *pte_addr = sun50i_mk_pte(paddr, prot);
> + sun50i_table_flush(sun50i_domain, pte_addr, 1);
This maps only one page, right? But the function needs to map up to
'size' as given in the parameter list.
> +
> + spin_lock_irqsave(&iommu->iommu_lock, flags);
> + sun50i_iommu_tlb_invalidate(iommu, iova);
> + spin_unlock_irqrestore(&iommu->iommu_lock, flags);
Why is there a need to flush the TLB here? The IOMMU-API provides
call-backs so that the user of the API can decide when it wants
to flush the IO/TLB. Such flushes are usually expensive and doing them
on every map and unmap will cost significant performance.
> +static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
> + size_t size, struct iommu_iotlb_gather *gather)
> +{
> + struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + unsigned long flags;
> + phys_addr_t pt_phys;
> + dma_addr_t pte_dma;
> + u32 *pte_addr;
> + u32 dte;
> +
> + spin_lock_irqsave(&sun50i_domain->dt_lock, flags);
> +
> + dte = sun50i_domain->dt[sun50i_iova_get_dte_index(iova)];
> + if (!sun50i_dte_is_pt_valid(dte)) {
> + spin_unlock_irqrestore(&sun50i_domain->dt_lock, flags);
> + return 0;
> + }
> +
> + pt_phys = sun50i_dte_get_pt_address(dte);
> + pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);
> + pte_dma = pt_phys + sun50i_iova_get_pte_index(iova) * PT_ENTRY_SIZE;
> +
> + if (!sun50i_pte_is_page_valid(*pte_addr)) {
> + spin_unlock_irqrestore(&sun50i_domain->dt_lock, flags);
> + return 0;
> + }
> +
> + memset(pte_addr, 0, sizeof(*pte_addr));
> + sun50i_table_flush(sun50i_domain, pte_addr, 1);
> +
> + spin_lock(&iommu->iommu_lock);
> + sun50i_iommu_tlb_invalidate(iommu, iova);
> + sun50i_iommu_ptw_invalidate(iommu, iova);
> + spin_unlock(&iommu->iommu_lock);
Same objections as in the map function. This only unmaps one page, and
is the IO/TLB flush really needed here?
> +static struct iommu_domain *sun50i_iommu_domain_alloc(unsigned type)
> +{
> + struct sun50i_iommu_domain *sun50i_domain;
> +
> + if (type != IOMMU_DOMAIN_DMA && type != IOMMU_DOMAIN_UNMANAGED)
> + return NULL;
I think you should at least also support identity domains here. The
iommu-core code might allocate those for default domains.
Regards,
Joerg
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Chen-Yu Tsai <wens@csie.org>, Maxime Ripard <mripard@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
iommu@lists.linux-foundation.org
Subject: Re: [PATCH v2 2/4] iommu: Add Allwinner H6 IOMMU driver
Date: Mon, 2 Mar 2020 16:36:06 +0100 [thread overview]
Message-ID: <20200302153606.GB6540@8bytes.org> (raw)
In-Reply-To: <6864f0f28825bb7a2ec1c0d811a4aacdecf5f945.1582222496.git-series.maxime@cerno.tech>
Hi Maxime,
On Thu, Feb 20, 2020 at 07:15:14PM +0100, Maxime Ripard wrote:
> +struct sun50i_iommu_domain {
> + struct iommu_domain domain;
> +
> + /* Number of devices attached to the domain */
> + refcount_t refcnt;
> +
> + /* Lock to modify the Directory Table */
> + spinlock_t dt_lock;
I suggest you make page-table updates lock-less. Otherwise this lock
will become a bottle-neck when using the IOMMU through DMA-API.
> +
> +static int sun50i_iommu_map(struct iommu_domain *domain, unsigned long iova,
> + phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
> +{
> + struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + u32 pte_index;
> + u32 *page_table, *pte_addr;
> + unsigned long flags;
> + int ret = 0;
> +
> + spin_lock_irqsave(&sun50i_domain->dt_lock, flags);
> + page_table = sun50i_dte_get_page_table(sun50i_domain, iova, gfp);
> + if (IS_ERR(page_table)) {
> + ret = PTR_ERR(page_table);
> + goto out;
> + }
> +
> + pte_index = sun50i_iova_get_pte_index(iova);
> + pte_addr = &page_table[pte_index];
> + if (sun50i_pte_is_page_valid(*pte_addr)) {
You can use unlikely() here.
> + phys_addr_t page_phys = sun50i_pte_get_page_address(*pte_addr);
> + dev_err(iommu->dev,
> + "iova %pad already mapped to %pa cannot remap to %pa prot: %#x\n",
> + &iova, &page_phys, &paddr, prot);
> + ret = -EBUSY;
> + goto out;
> + }
> +
> + *pte_addr = sun50i_mk_pte(paddr, prot);
> + sun50i_table_flush(sun50i_domain, pte_addr, 1);
This maps only one page, right? But the function needs to map up to
'size' as given in the parameter list.
> +
> + spin_lock_irqsave(&iommu->iommu_lock, flags);
> + sun50i_iommu_tlb_invalidate(iommu, iova);
> + spin_unlock_irqrestore(&iommu->iommu_lock, flags);
Why is there a need to flush the TLB here? The IOMMU-API provides
call-backs so that the user of the API can decide when it wants
to flush the IO/TLB. Such flushes are usually expensive and doing them
on every map and unmap will cost significant performance.
> +static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
> + size_t size, struct iommu_iotlb_gather *gather)
> +{
> + struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
> + struct sun50i_iommu *iommu = sun50i_domain->iommu;
> + unsigned long flags;
> + phys_addr_t pt_phys;
> + dma_addr_t pte_dma;
> + u32 *pte_addr;
> + u32 dte;
> +
> + spin_lock_irqsave(&sun50i_domain->dt_lock, flags);
> +
> + dte = sun50i_domain->dt[sun50i_iova_get_dte_index(iova)];
> + if (!sun50i_dte_is_pt_valid(dte)) {
> + spin_unlock_irqrestore(&sun50i_domain->dt_lock, flags);
> + return 0;
> + }
> +
> + pt_phys = sun50i_dte_get_pt_address(dte);
> + pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);
> + pte_dma = pt_phys + sun50i_iova_get_pte_index(iova) * PT_ENTRY_SIZE;
> +
> + if (!sun50i_pte_is_page_valid(*pte_addr)) {
> + spin_unlock_irqrestore(&sun50i_domain->dt_lock, flags);
> + return 0;
> + }
> +
> + memset(pte_addr, 0, sizeof(*pte_addr));
> + sun50i_table_flush(sun50i_domain, pte_addr, 1);
> +
> + spin_lock(&iommu->iommu_lock);
> + sun50i_iommu_tlb_invalidate(iommu, iova);
> + sun50i_iommu_ptw_invalidate(iommu, iova);
> + spin_unlock(&iommu->iommu_lock);
Same objections as in the map function. This only unmaps one page, and
is the IO/TLB flush really needed here?
> +static struct iommu_domain *sun50i_iommu_domain_alloc(unsigned type)
> +{
> + struct sun50i_iommu_domain *sun50i_domain;
> +
> + if (type != IOMMU_DOMAIN_DMA && type != IOMMU_DOMAIN_UNMANAGED)
> + return NULL;
I think you should at least also support identity domains here. The
iommu-core code might allocate those for default domains.
Regards,
Joerg
next prev parent reply other threads:[~2020-03-02 15:36 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-20 18:15 [PATCH v2 0/4] iommu: Add Allwinner H6 IOMMU driver Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` [PATCH v2 1/4] dt-bindings: iommu: Add Allwinner H6 IOMMU bindings Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` [PATCH v2 2/4] iommu: Add Allwinner H6 IOMMU driver Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-03-02 15:36 ` Joerg Roedel [this message]
2020-03-02 15:36 ` Joerg Roedel
2020-03-02 15:36 ` Joerg Roedel
2020-04-01 11:47 ` Maxime Ripard
2020-04-01 11:47 ` Maxime Ripard
2020-04-01 11:47 ` Maxime Ripard
2020-04-08 14:06 ` Joerg Roedel
2020-04-08 14:06 ` Joerg Roedel
2020-04-08 14:06 ` Joerg Roedel
2020-04-20 14:39 ` Maxime Ripard
2020-04-20 14:39 ` Maxime Ripard
2020-04-20 14:39 ` Maxime Ripard
2020-04-20 16:16 ` Robin Murphy
2020-04-20 16:16 ` Robin Murphy
2020-04-20 16:16 ` Robin Murphy
2020-02-20 18:15 ` [PATCH v2 3/4] arm64: dts: allwinner: h6: Add IOMMU Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` [PATCH v2 4/4] drm/sun4i: mixer: Call of_dma_configure if there's an IOMMU Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
2020-02-20 18:15 ` Maxime Ripard
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