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From: Thierry Reding <thierry.reding@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	robh+dt@kernel.org, jonathanh@nvidia.com, andrew.murray@arm.com,
	kishon@ti.com, gustavo.pimentel@synopsys.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kthota@nvidia.com,
	mmaddireddy@nvidia.com, sagar.tv@gmail.com
Subject: Re: [PATCH V4 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194
Date: Tue, 3 Mar 2020 14:38:54 +0100	[thread overview]
Message-ID: <20200303133854.GA2854899@ulmo> (raw)
In-Reply-To: <20200303105418.2840-6-vidyas@nvidia.com>

[-- Attachment #1: Type: text/plain, Size: 3282 bytes --]

On Tue, Mar 03, 2020 at 04:24:18PM +0530, Vidya Sagar wrote:
> Add support for the endpoint mode of Synopsys DesignWare core based
> dual mode PCIe controllers present in Tegra194 SoC.
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> V4:
> * Addressed Lorenzo's review comments
> * Started using threaded irqs instead of kthreads
> 
> V3:
> * Addressed Thierry's review comments
> 
> V2:
> * Addressed Bjorn's review comments
> * Made changes as part of addressing review comments for other patches
> 
>  drivers/pci/controller/dwc/Kconfig         |  30 +-
>  drivers/pci/controller/dwc/pcie-tegra194.c | 681 ++++++++++++++++++++-
>  2 files changed, 693 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index 0830dfcfa43a..169cde58dd92 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -248,14 +248,38 @@ config PCI_MESON
>  	  implement the driver.
>  
>  config PCIE_TEGRA194
> -	tristate "NVIDIA Tegra194 (and later) PCIe controller"
> +	tristate
> +
> +config PCIE_TEGRA194_HOST
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
>  	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
>  	depends on PCI_MSI_IRQ_DOMAIN
>  	select PCIE_DW_HOST
>  	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
> +	default y
> +	help
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
> +
> +config PCIE_TEGRA194_EP
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode"
> +	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
> +	depends on PCI_ENDPOINT
> +	select PCIE_DW_EP
> +	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
>  	help
> -	  Say Y here if you want support for DesignWare core based PCIe host
> -	  controller found in NVIDIA Tegra194 SoC.
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
>  
>  config PCIE_UNIPHIER
>  	bool "Socionext UniPhier PCIe controllers"
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index cbe95f0ea0ca..81810e644b23 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -14,6 +14,8 @@
>  #include <linux/interrupt.h>
>  #include <linux/iopoll.h>
>  #include <linux/kernel.h>
> +#include <linux/kfifo.h>
> +#include <linux/kthread.h>

After moving to threaded IRQs, do you still need these includes?

Acked-by: Thierry Reding <treding@nvidia.com>

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org,
	bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	andrew.murray-5wv7dgnIgG8@public.gmane.org,
	kishon-l0cyMroinI0@public.gmane.org,
	gustavo.pimentel-HKixBCOQz3hWk0Htik3J/w@public.gmane.org,
	linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	kthota-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	mmaddireddy-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	sagar.tv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: Re: [PATCH V4 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194
Date: Tue, 3 Mar 2020 14:38:54 +0100	[thread overview]
Message-ID: <20200303133854.GA2854899@ulmo> (raw)
In-Reply-To: <20200303105418.2840-6-vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 3340 bytes --]

On Tue, Mar 03, 2020 at 04:24:18PM +0530, Vidya Sagar wrote:
> Add support for the endpoint mode of Synopsys DesignWare core based
> dual mode PCIe controllers present in Tegra194 SoC.
> 
> Signed-off-by: Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> V4:
> * Addressed Lorenzo's review comments
> * Started using threaded irqs instead of kthreads
> 
> V3:
> * Addressed Thierry's review comments
> 
> V2:
> * Addressed Bjorn's review comments
> * Made changes as part of addressing review comments for other patches
> 
>  drivers/pci/controller/dwc/Kconfig         |  30 +-
>  drivers/pci/controller/dwc/pcie-tegra194.c | 681 ++++++++++++++++++++-
>  2 files changed, 693 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index 0830dfcfa43a..169cde58dd92 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -248,14 +248,38 @@ config PCI_MESON
>  	  implement the driver.
>  
>  config PCIE_TEGRA194
> -	tristate "NVIDIA Tegra194 (and later) PCIe controller"
> +	tristate
> +
> +config PCIE_TEGRA194_HOST
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
>  	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
>  	depends on PCI_MSI_IRQ_DOMAIN
>  	select PCIE_DW_HOST
>  	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
> +	default y
> +	help
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
> +
> +config PCIE_TEGRA194_EP
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode"
> +	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
> +	depends on PCI_ENDPOINT
> +	select PCIE_DW_EP
> +	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
>  	help
> -	  Say Y here if you want support for DesignWare core based PCIe host
> -	  controller found in NVIDIA Tegra194 SoC.
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
>  
>  config PCIE_UNIPHIER
>  	bool "Socionext UniPhier PCIe controllers"
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index cbe95f0ea0ca..81810e644b23 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -14,6 +14,8 @@
>  #include <linux/interrupt.h>
>  #include <linux/iopoll.h>
>  #include <linux/kernel.h>
> +#include <linux/kfifo.h>
> +#include <linux/kthread.h>

After moving to threaded IRQs, do you still need these includes?

Acked-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Vidya Sagar <vidyas@nvidia.com>
Cc: devicetree@vger.kernel.org, lorenzo.pieralisi@arm.com,
	mmaddireddy@nvidia.com, kthota@nvidia.com,
	gustavo.pimentel@synopsys.com, linux-kernel@vger.kernel.org,
	kishon@ti.com, linux-tegra@vger.kernel.org, robh+dt@kernel.org,
	linux-pci@vger.kernel.org, bhelgaas@google.com,
	andrew.murray@arm.com, jonathanh@nvidia.com,
	linux-arm-kernel@lists.infradead.org, sagar.tv@gmail.com
Subject: Re: [PATCH V4 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194
Date: Tue, 3 Mar 2020 14:38:54 +0100	[thread overview]
Message-ID: <20200303133854.GA2854899@ulmo> (raw)
In-Reply-To: <20200303105418.2840-6-vidyas@nvidia.com>


[-- Attachment #1.1: Type: text/plain, Size: 3282 bytes --]

On Tue, Mar 03, 2020 at 04:24:18PM +0530, Vidya Sagar wrote:
> Add support for the endpoint mode of Synopsys DesignWare core based
> dual mode PCIe controllers present in Tegra194 SoC.
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> V4:
> * Addressed Lorenzo's review comments
> * Started using threaded irqs instead of kthreads
> 
> V3:
> * Addressed Thierry's review comments
> 
> V2:
> * Addressed Bjorn's review comments
> * Made changes as part of addressing review comments for other patches
> 
>  drivers/pci/controller/dwc/Kconfig         |  30 +-
>  drivers/pci/controller/dwc/pcie-tegra194.c | 681 ++++++++++++++++++++-
>  2 files changed, 693 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index 0830dfcfa43a..169cde58dd92 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -248,14 +248,38 @@ config PCI_MESON
>  	  implement the driver.
>  
>  config PCIE_TEGRA194
> -	tristate "NVIDIA Tegra194 (and later) PCIe controller"
> +	tristate
> +
> +config PCIE_TEGRA194_HOST
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
>  	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
>  	depends on PCI_MSI_IRQ_DOMAIN
>  	select PCIE_DW_HOST
>  	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
> +	default y
> +	help
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
> +
> +config PCIE_TEGRA194_EP
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode"
> +	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
> +	depends on PCI_ENDPOINT
> +	select PCIE_DW_EP
> +	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
>  	help
> -	  Say Y here if you want support for DesignWare core based PCIe host
> -	  controller found in NVIDIA Tegra194 SoC.
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
>  
>  config PCIE_UNIPHIER
>  	bool "Socionext UniPhier PCIe controllers"
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index cbe95f0ea0ca..81810e644b23 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -14,6 +14,8 @@
>  #include <linux/interrupt.h>
>  #include <linux/iopoll.h>
>  #include <linux/kernel.h>
> +#include <linux/kfifo.h>
> +#include <linux/kthread.h>

After moving to threaded IRQs, do you still need these includes?

Acked-by: Thierry Reding <treding@nvidia.com>

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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-03-03 13:39 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-03 10:54 [PATCH V4 0/5] Add support for PCIe endpoint mode in Tegra194 Vidya Sagar
2020-03-03 10:54 ` Vidya Sagar
2020-03-03 10:54 ` Vidya Sagar
2020-03-03 10:54 ` [PATCH V4 1/5] soc/tegra: bpmp: Update ABI header Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54 ` [PATCH V4 2/5] dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194 Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 13:39   ` Thierry Reding
2020-03-03 13:39     ` Thierry Reding
2020-03-03 10:54 ` [PATCH V4 3/5] arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194 Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54 ` [PATCH V4 4/5] arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54 ` [PATCH V4 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194 Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 10:54   ` Vidya Sagar
2020-03-03 13:38   ` Thierry Reding [this message]
2020-03-03 13:38     ` Thierry Reding
2020-03-03 13:38     ` Thierry Reding
2020-03-03 13:40 ` [PATCH V4 0/5] " Thierry Reding
2020-03-03 13:40   ` Thierry Reding
2020-03-03 13:40   ` Thierry Reding
2020-03-03 15:02   ` Lorenzo Pieralisi
2020-03-03 15:02     ` Lorenzo Pieralisi
2020-03-03 15:02     ` Lorenzo Pieralisi
2020-03-03 17:01 ` Lorenzo Pieralisi
2020-03-03 17:01   ` Lorenzo Pieralisi
2020-03-03 17:01   ` Lorenzo Pieralisi
2020-03-03 18:13   ` Vidya Sagar
2020-03-03 18:13     ` Vidya Sagar
2020-03-03 18:13     ` Vidya Sagar
2020-03-10 17:42     ` Vidya Sagar
2020-03-10 17:42       ` Vidya Sagar
2020-03-10 17:42       ` Vidya Sagar
2020-03-10 17:58       ` Lorenzo Pieralisi
2020-03-10 17:58         ` Lorenzo Pieralisi
2020-03-10 17:58         ` Lorenzo Pieralisi

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