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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Thierry Reding <thierry.reding@gmail.com>,
	letux-kernel@openphoenux.org, Sam Ravnborg <sam@ravnborg.org>
Subject: Re: [PATCH] drm/panel-simple: Fix dotclock for Ortustech COM37H3M
Date: Tue, 10 Mar 2020 14:07:37 +0200	[thread overview]
Message-ID: <20200310120737.GC13686@intel.com> (raw)
In-Reply-To: <e63a0533ad5b5142373437ef758aedbdb716152d.1583826198.git.hns@goldelico.com>

On Tue, Mar 10, 2020 at 08:43:19AM +0100, H. Nikolaus Schaller wrote:
> The currently listed dotclock disagrees with the currently
> listed vrefresh rate. Change the dotclock to match the vrefresh.
> 
> There are two variants of the COM37H3M panel.
> The older one's COM37H3M05DTC data sheet specifies:
> 
>                          MIN      TYP     MAX
> CLK frequency    fCLK     --       22.4    26.3 MHz (in VGA mode)
> VSYNC Frequency  fVSYNC   54       60      66   Hz
> VSYNC cycle time tv       --      650      --   H
> HSYNC frequency  fHSYNC   --       39.3    --   kHz
> HSYNC cycle time th       --      570      --   CLK
> 
> The newer one's COM37H3M99DTC data sheet says:
> 
>                          MIN      TYP     MAX
> CLK frequency    fCLK     18       19.8    27   MHz
> VSYNC Frequency  fVSYNC   54       60      66   Hz
> VSYNC cycle time tv      646      650     700   H
> HSYNC frequency  fHSYNC  --        39.0    50.0 kHz
> HSYNC cycle time th      504      508     630   CLK
> 
> So we choose a parameter set that lies within the specs
> of both variants. We start at .vrefresh = 60,
> choose .htotal = 570 and .vtotal = 650 and end up
> in a clock of 22.230 MHz.
> 
> Reported-by: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index e14c14ac62b5..b4cb23d4898d 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -2390,15 +2390,15 @@ static const struct panel_desc ontat_yx700wv03 = {
>  };
>  
>  static const struct drm_display_mode ortustech_com37h3m_mode  = {
> -	.clock = 22153,
> +	.clock = 22230,
>  	.hdisplay = 480,
> -	.hsync_start = 480 + 8,
> -	.hsync_end = 480 + 8 + 10,
> -	.htotal = 480 + 8 + 10 + 10,
> +	.hsync_start = 480 + 40,
> +	.hsync_end = 480 + 40 + 10,
> +	.htotal = 480 + 40 + 10 + 40,
>  	.vdisplay = 640,
>  	.vsync_start = 640 + 4,
> -	.vsync_end = 640 + 4 + 3,
> -	.vtotal = 640 + 4 + 3 + 4,
> +	.vsync_end = 640 + 4 + 2,
> +	.vtotal = 640 + 4 + 2 + 4,
>  	.vrefresh = 60,

Numbers look consistent.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
>  };
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Sam Ravnborg <sam@ravnborg.org>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	letux-kernel@openphoenux.org
Subject: Re: [PATCH] drm/panel-simple: Fix dotclock for Ortustech COM37H3M
Date: Tue, 10 Mar 2020 14:07:37 +0200	[thread overview]
Message-ID: <20200310120737.GC13686@intel.com> (raw)
In-Reply-To: <e63a0533ad5b5142373437ef758aedbdb716152d.1583826198.git.hns@goldelico.com>

On Tue, Mar 10, 2020 at 08:43:19AM +0100, H. Nikolaus Schaller wrote:
> The currently listed dotclock disagrees with the currently
> listed vrefresh rate. Change the dotclock to match the vrefresh.
> 
> There are two variants of the COM37H3M panel.
> The older one's COM37H3M05DTC data sheet specifies:
> 
>                          MIN      TYP     MAX
> CLK frequency    fCLK     --       22.4    26.3 MHz (in VGA mode)
> VSYNC Frequency  fVSYNC   54       60      66   Hz
> VSYNC cycle time tv       --      650      --   H
> HSYNC frequency  fHSYNC   --       39.3    --   kHz
> HSYNC cycle time th       --      570      --   CLK
> 
> The newer one's COM37H3M99DTC data sheet says:
> 
>                          MIN      TYP     MAX
> CLK frequency    fCLK     18       19.8    27   MHz
> VSYNC Frequency  fVSYNC   54       60      66   Hz
> VSYNC cycle time tv      646      650     700   H
> HSYNC frequency  fHSYNC  --        39.0    50.0 kHz
> HSYNC cycle time th      504      508     630   CLK
> 
> So we choose a parameter set that lies within the specs
> of both variants. We start at .vrefresh = 60,
> choose .htotal = 570 and .vtotal = 650 and end up
> in a clock of 22.230 MHz.
> 
> Reported-by: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index e14c14ac62b5..b4cb23d4898d 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -2390,15 +2390,15 @@ static const struct panel_desc ontat_yx700wv03 = {
>  };
>  
>  static const struct drm_display_mode ortustech_com37h3m_mode  = {
> -	.clock = 22153,
> +	.clock = 22230,
>  	.hdisplay = 480,
> -	.hsync_start = 480 + 8,
> -	.hsync_end = 480 + 8 + 10,
> -	.htotal = 480 + 8 + 10 + 10,
> +	.hsync_start = 480 + 40,
> +	.hsync_end = 480 + 40 + 10,
> +	.htotal = 480 + 40 + 10 + 40,
>  	.vdisplay = 640,
>  	.vsync_start = 640 + 4,
> -	.vsync_end = 640 + 4 + 3,
> -	.vtotal = 640 + 4 + 3 + 4,
> +	.vsync_end = 640 + 4 + 2,
> +	.vtotal = 640 + 4 + 2 + 4,
>  	.vrefresh = 60,

Numbers look consistent.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
>  };
> -- 
> 2.23.0

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2020-03-10 12:07 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-10  7:43 [PATCH] drm/panel-simple: Fix dotclock for Ortustech COM37H3M H. Nikolaus Schaller
2020-03-10  7:43 ` H. Nikolaus Schaller
2020-03-10 12:07 ` Ville Syrjälä [this message]
2020-03-10 12:07   ` Ville Syrjälä
2020-03-10 17:43 ` Sam Ravnborg
2020-03-10 17:43   ` Sam Ravnborg

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