From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Robert Foss <robert.foss@linaro.org>
Cc: agross@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org,
olof@lixom.net, Anson.Huang@nxp.com, maxime@cerno.tech,
leonard.crestez@nxp.com, dinguyen@kernel.org,
marcin.juszkiewicz@linaro.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Loic Poulain <loic.poulain@linaro.org>
Subject: Re: [v1 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node
Date: Wed, 11 Mar 2020 21:50:12 -0700 [thread overview]
Message-ID: <20200312045012.GT264362@yoga> (raw)
In-Reply-To: <20200311123501.18202-2-robert.foss@linaro.org>
On Wed 11 Mar 05:34 PDT 2020, Robert Foss wrote:
> From: Loic Poulain <loic.poulain@linaro.org>
>
> The msm8916 CCI controller provides one CCI/I2C bus.
>
> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 9f31064f2374..afe1d73e5cd3 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1503,6 +1503,33 @@
> };
> };
>
> + cci@1b0c000 {
This deserves a label, so that it's possible to reference it and alter
the status in the board dts.
> + compatible = "qcom,msm8916-cci";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1b0c000 0x1000>;
Please sort nodes my address (and then by name).
Apart from these two nits, this looks good.
Regards,
Bjorn
> + interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>,
> + <&gcc GCC_CAMSS_AHB_CLK>;
> + clock-names = "camss_top_ahb", "cci_ahb",
> + "cci", "camss_ahb";
> + assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>;
> + assigned-clock-rates = <80000000>, <19200000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&cci0_default>;
> + status = "disabled";
> +
> + cci0: i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <400000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> camss: camss@1b00000 {
> compatible = "qcom,msm8916-camss";
> reg = <0x1b0ac00 0x200>,
> --
> 2.20.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Robert Foss <robert.foss@linaro.org>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
Loic Poulain <loic.poulain@linaro.org>,
Anson.Huang@nxp.com, catalin.marinas@arm.com,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
marcin.juszkiewicz@linaro.org, dinguyen@kernel.org,
agross@kernel.org, maxime@cerno.tech,
linux-arm-msm@vger.kernel.org, olof@lixom.net,
shawnguo@kernel.org, leonard.crestez@nxp.com, will@kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [v1 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node
Date: Wed, 11 Mar 2020 21:50:12 -0700 [thread overview]
Message-ID: <20200312045012.GT264362@yoga> (raw)
In-Reply-To: <20200311123501.18202-2-robert.foss@linaro.org>
On Wed 11 Mar 05:34 PDT 2020, Robert Foss wrote:
> From: Loic Poulain <loic.poulain@linaro.org>
>
> The msm8916 CCI controller provides one CCI/I2C bus.
>
> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
> Signed-off-by: Robert Foss <robert.foss@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 9f31064f2374..afe1d73e5cd3 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1503,6 +1503,33 @@
> };
> };
>
> + cci@1b0c000 {
This deserves a label, so that it's possible to reference it and alter
the status in the board dts.
> + compatible = "qcom,msm8916-cci";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1b0c000 0x1000>;
Please sort nodes my address (and then by name).
Apart from these two nits, this looks good.
Regards,
Bjorn
> + interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>,
> + <&gcc GCC_CAMSS_AHB_CLK>;
> + clock-names = "camss_top_ahb", "cci_ahb",
> + "cci", "camss_ahb";
> + assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>;
> + assigned-clock-rates = <80000000>, <19200000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&cci0_default>;
> + status = "disabled";
> +
> + cci0: i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <400000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> camss: camss@1b00000 {
> compatible = "qcom,msm8916-camss";
> reg = <0x1b0ac00 0x200>,
> --
> 2.20.1
>
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next prev parent reply other threads:[~2020-03-12 4:50 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-11 12:34 [v1 0/6] Qualcomm CCI & Camera for db410c & db845c Robert Foss
2020-03-11 12:34 ` Robert Foss
2020-03-11 12:34 ` [v1 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node Robert Foss
2020-03-11 12:34 ` Robert Foss
2020-03-12 4:50 ` Bjorn Andersson [this message]
2020-03-12 4:50 ` Bjorn Andersson
2020-03-11 12:34 ` [v1 2/6] arm64: dts: apq8016-sbc: Add CCI/Sensor nodes Robert Foss
2020-03-11 12:34 ` Robert Foss
2020-03-12 5:03 ` Bjorn Andersson
2020-03-12 5:03 ` Bjorn Andersson
2020-03-11 12:34 ` [v1 3/6] arm64: dts: sdm845: Add i2c-qcom-cci node Robert Foss
2020-03-11 12:34 ` Robert Foss
2020-03-12 5:12 ` Bjorn Andersson
2020-03-12 5:12 ` Bjorn Andersson
2020-03-11 12:34 ` [v1 4/6] arm64: dts: sdm845-db845c: Add pm_8998 gpio names Robert Foss
2020-03-11 12:34 ` Robert Foss
2020-03-12 5:13 ` Bjorn Andersson
2020-03-12 5:13 ` Bjorn Andersson
2020-03-11 12:35 ` [v1 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes Robert Foss
2020-03-11 12:35 ` Robert Foss
2020-03-12 5:34 ` Bjorn Andersson
2020-03-12 5:34 ` Bjorn Andersson
2020-03-11 12:35 ` [v1 6/6] arm64: defconfig: Enable QCOM CAMCC, CAMSS and CCI drivers Robert Foss
2020-03-11 12:35 ` Robert Foss
2020-03-12 5:35 ` Bjorn Andersson
2020-03-12 5:35 ` Bjorn Andersson
2020-03-17 13:54 ` Robert Foss
2020-03-17 13:54 ` Robert Foss
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