From: Manasi Navare <manasi.d.navare@intel.com>
To: Animesh Manna <animesh.manna@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 5/7] drm/i915/dp: Add debugfs entry for DP phy compliance
Date: Thu, 12 Mar 2020 15:51:37 -0700 [thread overview]
Message-ID: <20200312225137.GD8846@intel.com> (raw)
In-Reply-To: <20200310153745.22814-6-animesh.manna@intel.com>
On Tue, Mar 10, 2020 at 09:07:43PM +0530, Animesh Manna wrote:
> These debugfs entry will help testapp to understand the test request
> during dp phy compliance mode.
>
> Acked-by: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 1e6eb7f2f72d..ab20b7ea26f7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1326,6 +1326,16 @@ static int i915_displayport_test_data_show(struct seq_file *m, void *data)
> intel_dp->compliance.test_data.vdisplay);
> seq_printf(m, "bpc: %u\n",
> intel_dp->compliance.test_data.bpc);
> + } else if (intel_dp->compliance.test_type ==
> + DP_TEST_LINK_PHY_TEST_PATTERN) {
> + seq_printf(m, "pattern: %d\n",
> + intel_dp->compliance.test_data.phytest.phy_pattern);
> + seq_printf(m, "Number of lanes: %d\n",
> + intel_dp->compliance.test_data.phytest.num_lanes);
> + seq_printf(m, "Link Rate: %d\n",
> + intel_dp->compliance.test_data.phytest.link_rate);
> + seq_printf(m, "level: %02x\n",
> + intel_dp->train_set[0]);
> }
> } else
> seq_puts(m, "0");
> @@ -1358,7 +1368,7 @@ static int i915_displayport_test_type_show(struct seq_file *m, void *data)
>
> if (encoder && connector->status == connector_status_connected) {
> intel_dp = enc_to_intel_dp(encoder);
> - seq_printf(m, "%02lx", intel_dp->compliance.test_type);
> + seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
> } else
> seq_puts(m, "0");
> }
> --
> 2.24.0
>
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next prev parent reply other threads:[~2020-03-12 22:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-10 15:37 [Intel-gfx] [PATCH v4 0/7] DP Phy compliance auto test Animesh Manna
2020-03-10 15:37 ` [Intel-gfx] [PATCH v4 1/7] drm/amd/display: Align macro name as per DP spec Animesh Manna
2020-03-12 22:19 ` Manasi Navare
2020-03-10 15:37 ` [Intel-gfx] [PATCH v4 2/7] drm/dp: get/set phy compliance pattern Animesh Manna
2020-03-12 22:28 ` Manasi Navare
2020-03-10 15:37 ` [Intel-gfx] [PATCH v4 3/7] drm/i915/dp: Made intel_dp_adjust_train() non-static Animesh Manna
2020-03-12 22:30 ` Manasi Navare
2020-03-10 15:37 ` [Intel-gfx] [PATCH v4 4/7] drm/i915/dp: Preparation for DP phy compliance auto test Animesh Manna
2020-03-10 15:37 ` [Intel-gfx] [PATCH v4 5/7] drm/i915/dp: Add debugfs entry for DP phy compliance Animesh Manna
2020-03-12 22:51 ` Manasi Navare [this message]
2020-03-10 15:37 ` [Intel-gfx] [PATCH v4 6/7] drm/i915/dp: Register definition for DP compliance register Animesh Manna
2020-03-12 23:08 ` Manasi Navare
2020-03-10 15:37 ` [Intel-gfx] [PATCH v4 7/7] drm/i915/dp: Program vswing, pre-emphasis, test-pattern Animesh Manna
2020-03-11 1:19 ` Almahallawy, Khaled
2020-03-12 23:42 ` Manasi Navare
2020-03-11 9:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for DP Phy compliance auto test (rev6) Patchwork
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